SDL_cpuinfo.c 34 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2021 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #ifdef TEST_MAIN
  19. #include "SDL_config.h"
  20. #else
  21. #include "../SDL_internal.h"
  22. #endif
  23. #if defined(__WIN32__) || defined(__WINRT__)
  24. #include "../core/windows/SDL_windows.h"
  25. #endif
  26. #if defined(__OS2__)
  27. #undef HAVE_SYSCTLBYNAME
  28. #define INCL_DOS
  29. #include <os2.h>
  30. #ifndef QSV_NUMPROCESSORS
  31. #define QSV_NUMPROCESSORS 26
  32. #endif
  33. #endif
  34. /* CPU feature detection for SDL */
  35. #include "SDL_cpuinfo.h"
  36. #include "SDL_assert.h"
  37. #ifdef HAVE_SYSCONF
  38. #include <unistd.h>
  39. #endif
  40. #ifdef HAVE_SYSCTLBYNAME
  41. #include <sys/types.h>
  42. #include <sys/sysctl.h>
  43. #endif
  44. #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
  45. #include <sys/sysctl.h> /* For AltiVec check */
  46. #elif (defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
  47. #include <sys/param.h>
  48. #include <sys/sysctl.h> /* For AltiVec check */
  49. #include <machine/cpu.h>
  50. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  51. #include <signal.h>
  52. #include <setjmp.h>
  53. #endif
  54. #if defined(__QNXNTO__)
  55. #include <sys/syspage.h>
  56. #endif
  57. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__arm__)
  58. #include <unistd.h>
  59. #include <sys/types.h>
  60. #include <sys/stat.h>
  61. #include <fcntl.h>
  62. #include <elf.h>
  63. /*#include <asm/hwcap.h>*/
  64. #ifndef AT_HWCAP
  65. #define AT_HWCAP 16
  66. #endif
  67. #ifndef AT_PLATFORM
  68. #define AT_PLATFORM 15
  69. #endif
  70. #ifndef HWCAP_NEON
  71. #define HWCAP_NEON (1 << 12)
  72. #endif
  73. #endif
  74. #if defined(__ANDROID__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  75. #include <cpu-features.h>
  76. #endif
  77. #if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
  78. #include <sys/auxv.h>
  79. #endif
  80. #ifdef __RISCOS__
  81. #include <kernel.h>
  82. #include <swis.h>
  83. #endif
  84. #define CPU_HAS_RDTSC (1 << 0)
  85. #define CPU_HAS_ALTIVEC (1 << 1)
  86. #define CPU_HAS_MMX (1 << 2)
  87. #define CPU_HAS_3DNOW (1 << 3)
  88. #define CPU_HAS_SSE (1 << 4)
  89. #define CPU_HAS_SSE2 (1 << 5)
  90. #define CPU_HAS_SSE3 (1 << 6)
  91. #define CPU_HAS_SSE41 (1 << 7)
  92. #define CPU_HAS_SSE42 (1 << 8)
  93. #define CPU_HAS_AVX (1 << 9)
  94. #define CPU_HAS_AVX2 (1 << 10)
  95. #define CPU_HAS_NEON (1 << 11)
  96. #define CPU_HAS_AVX512F (1 << 12)
  97. #define CPU_HAS_ARM_SIMD (1 << 13)
  98. #if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__
  99. /* This is the brute force way of detecting instruction sets...
  100. the idea is borrowed from the libmpeg2 library - thanks!
  101. */
  102. static jmp_buf jmpbuf;
  103. static void
  104. illegal_instruction(int sig)
  105. {
  106. longjmp(jmpbuf, 1);
  107. }
  108. #endif /* HAVE_SETJMP */
  109. static int
  110. CPU_haveCPUID(void)
  111. {
  112. int has_CPUID = 0;
  113. /* *INDENT-OFF* */
  114. #ifndef SDL_CPUINFO_DISABLED
  115. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  116. __asm__ (
  117. " pushfl # Get original EFLAGS \n"
  118. " popl %%eax \n"
  119. " movl %%eax,%%ecx \n"
  120. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  121. " pushl %%eax # Save new EFLAGS value on stack \n"
  122. " popfl # Replace current EFLAGS value \n"
  123. " pushfl # Get new EFLAGS \n"
  124. " popl %%eax # Store new EFLAGS in EAX \n"
  125. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  126. " jz 1f # Processor=80486 \n"
  127. " movl $1,%0 # We have CPUID support \n"
  128. "1: \n"
  129. : "=m" (has_CPUID)
  130. :
  131. : "%eax", "%ecx"
  132. );
  133. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  134. /* Technically, if this is being compiled under __x86_64__ then it has
  135. CPUid by definition. But it's nice to be able to prove it. :) */
  136. __asm__ (
  137. " pushfq # Get original EFLAGS \n"
  138. " popq %%rax \n"
  139. " movq %%rax,%%rcx \n"
  140. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  141. " pushq %%rax # Save new EFLAGS value on stack \n"
  142. " popfq # Replace current EFLAGS value \n"
  143. " pushfq # Get new EFLAGS \n"
  144. " popq %%rax # Store new EFLAGS in EAX \n"
  145. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  146. " jz 1f # Processor=80486 \n"
  147. " movl $1,%0 # We have CPUID support \n"
  148. "1: \n"
  149. : "=m" (has_CPUID)
  150. :
  151. : "%rax", "%rcx"
  152. );
  153. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  154. __asm {
  155. pushfd ; Get original EFLAGS
  156. pop eax
  157. mov ecx, eax
  158. xor eax, 200000h ; Flip ID bit in EFLAGS
  159. push eax ; Save new EFLAGS value on stack
  160. popfd ; Replace current EFLAGS value
  161. pushfd ; Get new EFLAGS
  162. pop eax ; Store new EFLAGS in EAX
  163. xor eax, ecx ; Can not toggle ID bit,
  164. jz done ; Processor=80486
  165. mov has_CPUID,1 ; We have CPUID support
  166. done:
  167. }
  168. #elif defined(_MSC_VER) && defined(_M_X64)
  169. has_CPUID = 1;
  170. #elif defined(__sun) && defined(__i386)
  171. __asm (
  172. " pushfl \n"
  173. " popl %eax \n"
  174. " movl %eax,%ecx \n"
  175. " xorl $0x200000,%eax \n"
  176. " pushl %eax \n"
  177. " popfl \n"
  178. " pushfl \n"
  179. " popl %eax \n"
  180. " xorl %ecx,%eax \n"
  181. " jz 1f \n"
  182. " movl $1,-8(%ebp) \n"
  183. "1: \n"
  184. );
  185. #elif defined(__sun) && defined(__amd64)
  186. __asm (
  187. " pushfq \n"
  188. " popq %rax \n"
  189. " movq %rax,%rcx \n"
  190. " xorl $0x200000,%eax \n"
  191. " pushq %rax \n"
  192. " popfq \n"
  193. " pushfq \n"
  194. " popq %rax \n"
  195. " xorl %ecx,%eax \n"
  196. " jz 1f \n"
  197. " movl $1,-8(%rbp) \n"
  198. "1: \n"
  199. );
  200. #endif
  201. #endif
  202. /* *INDENT-ON* */
  203. return has_CPUID;
  204. }
  205. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  206. #define cpuid(func, a, b, c, d) \
  207. __asm__ __volatile__ ( \
  208. " pushl %%ebx \n" \
  209. " xorl %%ecx,%%ecx \n" \
  210. " cpuid \n" \
  211. " movl %%ebx, %%esi \n" \
  212. " popl %%ebx \n" : \
  213. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  214. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  215. #define cpuid(func, a, b, c, d) \
  216. __asm__ __volatile__ ( \
  217. " pushq %%rbx \n" \
  218. " xorq %%rcx,%%rcx \n" \
  219. " cpuid \n" \
  220. " movq %%rbx, %%rsi \n" \
  221. " popq %%rbx \n" : \
  222. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  223. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  224. #define cpuid(func, a, b, c, d) \
  225. __asm { \
  226. __asm mov eax, func \
  227. __asm xor ecx, ecx \
  228. __asm cpuid \
  229. __asm mov a, eax \
  230. __asm mov b, ebx \
  231. __asm mov c, ecx \
  232. __asm mov d, edx \
  233. }
  234. #elif defined(_MSC_VER) && defined(_M_X64)
  235. #define cpuid(func, a, b, c, d) \
  236. { \
  237. int CPUInfo[4]; \
  238. __cpuid(CPUInfo, func); \
  239. a = CPUInfo[0]; \
  240. b = CPUInfo[1]; \
  241. c = CPUInfo[2]; \
  242. d = CPUInfo[3]; \
  243. }
  244. #else
  245. #define cpuid(func, a, b, c, d) \
  246. do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
  247. #endif
  248. static int CPU_CPUIDFeatures[4];
  249. static int CPU_CPUIDMaxFunction = 0;
  250. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  251. static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
  252. static void
  253. CPU_calcCPUIDFeatures(void)
  254. {
  255. static SDL_bool checked = SDL_FALSE;
  256. if (!checked) {
  257. checked = SDL_TRUE;
  258. if (CPU_haveCPUID()) {
  259. int a, b, c, d;
  260. cpuid(0, a, b, c, d);
  261. CPU_CPUIDMaxFunction = a;
  262. if (CPU_CPUIDMaxFunction >= 1) {
  263. cpuid(1, a, b, c, d);
  264. CPU_CPUIDFeatures[0] = a;
  265. CPU_CPUIDFeatures[1] = b;
  266. CPU_CPUIDFeatures[2] = c;
  267. CPU_CPUIDFeatures[3] = d;
  268. /* Check to make sure we can call xgetbv */
  269. if (c & 0x08000000) {
  270. /* Call xgetbv to see if YMM (etc) register state is saved */
  271. #if (defined(__GNUC__) || defined(__llvm__)) && (defined(__i386__) || defined(__x86_64__))
  272. __asm__(".byte 0x0f, 0x01, 0xd0" : "=a" (a) : "c" (0) : "%edx");
  273. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  274. a = (int)_xgetbv(0);
  275. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  276. __asm
  277. {
  278. xor ecx, ecx
  279. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  280. mov a, eax
  281. }
  282. #endif
  283. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  284. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
  285. }
  286. }
  287. }
  288. }
  289. }
  290. static int
  291. CPU_haveAltiVec(void)
  292. {
  293. volatile int altivec = 0;
  294. #ifndef SDL_CPUINFO_DISABLED
  295. #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__)) || (defined(__FreeBSD__) && defined(__powerpc__))
  296. #ifdef __OpenBSD__
  297. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  298. #elif defined(__FreeBSD__)
  299. int selectors[2] = { CTL_HW, PPC_FEATURE_HAS_ALTIVEC };
  300. #else
  301. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  302. #endif
  303. int hasVectorUnit = 0;
  304. size_t length = sizeof(hasVectorUnit);
  305. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  306. if (0 == error)
  307. altivec = (hasVectorUnit != 0);
  308. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  309. void (*handler) (int sig);
  310. handler = signal(SIGILL, illegal_instruction);
  311. if (setjmp(jmpbuf) == 0) {
  312. asm volatile ("mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::"r" (-1));
  313. altivec = 1;
  314. }
  315. signal(SIGILL, handler);
  316. #endif
  317. #endif
  318. return altivec;
  319. }
  320. #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) || defined(__aarch64__)
  321. static int
  322. CPU_haveARMSIMD(void)
  323. {
  324. return 1;
  325. }
  326. #elif !defined(__arm__)
  327. static int
  328. CPU_haveARMSIMD(void)
  329. {
  330. return 0;
  331. }
  332. #elif defined(__LINUX__)
  333. static int
  334. CPU_haveARMSIMD(void)
  335. {
  336. int arm_simd = 0;
  337. int fd;
  338. fd = open("/proc/self/auxv", O_RDONLY);
  339. if (fd >= 0)
  340. {
  341. Elf32_auxv_t aux;
  342. while (read(fd, &aux, sizeof aux) == sizeof aux)
  343. {
  344. if (aux.a_type == AT_PLATFORM)
  345. {
  346. const char *plat = (const char *) aux.a_un.a_val;
  347. if (plat) {
  348. arm_simd = strncmp(plat, "v6l", 3) == 0 ||
  349. strncmp(plat, "v7l", 3) == 0;
  350. }
  351. }
  352. }
  353. close(fd);
  354. }
  355. return arm_simd;
  356. }
  357. #elif defined(__RISCOS__)
  358. static int
  359. CPU_haveARMSIMD(void)
  360. {
  361. _kernel_swi_regs regs;
  362. regs.r[0] = 0;
  363. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  364. return 0;
  365. if (!(regs.r[0] & (1<<31)))
  366. return 0;
  367. regs.r[0] = 34;
  368. regs.r[1] = 29;
  369. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  370. return 0;
  371. return regs.r[0];
  372. }
  373. #else
  374. static int
  375. CPU_haveARMSIMD(void)
  376. {
  377. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  378. return 0;
  379. }
  380. #endif
  381. #if defined(__LINUX__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  382. static int
  383. readProcAuxvForNeon(void)
  384. {
  385. int neon = 0;
  386. int fd;
  387. fd = open("/proc/self/auxv", O_RDONLY);
  388. if (fd >= 0)
  389. {
  390. Elf32_auxv_t aux;
  391. while (read(fd, &aux, sizeof (aux)) == sizeof (aux)) {
  392. if (aux.a_type == AT_HWCAP) {
  393. neon = (aux.a_un.a_val & HWCAP_NEON) == HWCAP_NEON;
  394. break;
  395. }
  396. }
  397. close(fd);
  398. }
  399. return neon;
  400. }
  401. #endif
  402. static int
  403. CPU_haveNEON(void)
  404. {
  405. /* The way you detect NEON is a privileged instruction on ARM, so you have
  406. query the OS kernel in a platform-specific way. :/ */
  407. #if defined(SDL_CPUINFO_DISABLED)
  408. return 0; /* disabled */
  409. #elif (defined(__WINDOWS__) || defined(__WINRT__)) && (defined(_M_ARM) || defined(_M_ARM64))
  410. /* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
  411. /* Seems to have been removed */
  412. # if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
  413. # define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  414. # endif
  415. /* All WinRT ARM devices are required to support NEON, but just in case. */
  416. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  417. #elif (defined(__ARM_ARCH) && (__ARM_ARCH >= 8)) || defined(__aarch64__)
  418. return 1; /* ARMv8 always has non-optional NEON support. */
  419. #elif __VITA__
  420. return 1;
  421. #elif defined(__APPLE__) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  422. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  423. return 1; /* all Apple ARMv7 chips and later have NEON. */
  424. #elif defined(__APPLE__)
  425. return 0; /* assume anything else from Apple doesn't have NEON. */
  426. #elif !defined(__arm__)
  427. return 0; /* not an ARM CPU at all. */
  428. #elif defined(__OpenBSD__)
  429. return 1; /* OpenBSD only supports ARMv7 CPUs that have NEON. */
  430. #elif defined(HAVE_ELF_AUX_INFO)
  431. unsigned long hasneon = 0;
  432. if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0)
  433. return 0;
  434. return ((hasneon & HWCAP_NEON) == HWCAP_NEON);
  435. #elif defined(__QNXNTO__)
  436. return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
  437. #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
  438. return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
  439. #elif defined(__LINUX__)
  440. return readProcAuxvForNeon();
  441. #elif defined(__ANDROID__)
  442. /* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
  443. {
  444. AndroidCpuFamily cpu_family = android_getCpuFamily();
  445. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  446. uint64_t cpu_features = android_getCpuFeatures();
  447. if ((cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) != 0) {
  448. return 1;
  449. }
  450. }
  451. return 0;
  452. }
  453. #elif defined(__RISCOS__)
  454. /* Use the VFPSupport_Features SWI to access the MVFR registers */
  455. {
  456. _kernel_swi_regs regs;
  457. regs.r[0] = 0;
  458. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  459. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  460. return 1;
  461. }
  462. }
  463. return 0;
  464. }
  465. #else
  466. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  467. return 0;
  468. #endif
  469. }
  470. #if defined(__e2k__)
  471. inline int
  472. CPU_have3DNow(void)
  473. {
  474. #if defined(__3dNOW__)
  475. return 1;
  476. #else
  477. return 0;
  478. #endif
  479. }
  480. #else
  481. static int
  482. CPU_have3DNow(void)
  483. {
  484. if (CPU_CPUIDMaxFunction > 0) { /* that is, do we have CPUID at all? */
  485. int a, b, c, d;
  486. cpuid(0x80000000, a, b, c, d);
  487. if (a >= 0x80000001) {
  488. cpuid(0x80000001, a, b, c, d);
  489. return (d & 0x80000000);
  490. }
  491. }
  492. return 0;
  493. }
  494. #endif
  495. #if defined(__e2k__)
  496. #define CPU_haveRDTSC() (0)
  497. #if defined(__MMX__)
  498. #define CPU_haveMMX() (1)
  499. #else
  500. #define CPU_haveMMX() (0)
  501. #endif
  502. #if defined(__SSE__)
  503. #define CPU_haveSSE() (1)
  504. #else
  505. #define CPU_haveSSE() (0)
  506. #endif
  507. #if defined(__SSE2__)
  508. #define CPU_haveSSE2() (1)
  509. #else
  510. #define CPU_haveSSE2() (0)
  511. #endif
  512. #if defined(__SSE3__)
  513. #define CPU_haveSSE3() (1)
  514. #else
  515. #define CPU_haveSSE3() (0)
  516. #endif
  517. #if defined(__SSE4_1__)
  518. #define CPU_haveSSE41() (1)
  519. #else
  520. #define CPU_haveSSE41() (0)
  521. #endif
  522. #if defined(__SSE4_2__)
  523. #define CPU_haveSSE42() (1)
  524. #else
  525. #define CPU_haveSSE42() (0)
  526. #endif
  527. #if defined(__AVX__)
  528. #define CPU_haveAVX() (1)
  529. #else
  530. #define CPU_haveAVX() (0)
  531. #endif
  532. #else
  533. #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
  534. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  535. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  536. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  537. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  538. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  539. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  540. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  541. #endif
  542. #if defined(__e2k__)
  543. inline int
  544. CPU_haveAVX2(void)
  545. {
  546. #if defined(__AVX2__)
  547. return 1;
  548. #else
  549. return 0;
  550. #endif
  551. }
  552. #else
  553. static int
  554. CPU_haveAVX2(void)
  555. {
  556. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  557. int a, b, c, d;
  558. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  559. cpuid(7, a, b, c, d);
  560. return (b & 0x00000020);
  561. }
  562. return 0;
  563. }
  564. #endif
  565. #if defined(__e2k__)
  566. inline int
  567. CPU_haveAVX512F(void)
  568. {
  569. return 0;
  570. }
  571. #else
  572. static int
  573. CPU_haveAVX512F(void)
  574. {
  575. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  576. int a, b, c, d;
  577. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  578. cpuid(7, a, b, c, d);
  579. return (b & 0x00010000);
  580. }
  581. return 0;
  582. }
  583. #endif
  584. static int SDL_CPUCount = 0;
  585. int
  586. SDL_GetCPUCount(void)
  587. {
  588. if (!SDL_CPUCount) {
  589. #ifndef SDL_CPUINFO_DISABLED
  590. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  591. if (SDL_CPUCount <= 0) {
  592. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  593. }
  594. #endif
  595. #ifdef HAVE_SYSCTLBYNAME
  596. if (SDL_CPUCount <= 0) {
  597. size_t size = sizeof(SDL_CPUCount);
  598. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  599. }
  600. #endif
  601. #ifdef __WIN32__
  602. if (SDL_CPUCount <= 0) {
  603. SYSTEM_INFO info;
  604. GetSystemInfo(&info);
  605. SDL_CPUCount = info.dwNumberOfProcessors;
  606. }
  607. #endif
  608. #ifdef __OS2__
  609. if (SDL_CPUCount <= 0) {
  610. DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
  611. &SDL_CPUCount, sizeof(SDL_CPUCount) );
  612. }
  613. #endif
  614. #endif
  615. /* There has to be at least 1, right? :) */
  616. if (SDL_CPUCount <= 0) {
  617. SDL_CPUCount = 1;
  618. }
  619. }
  620. return SDL_CPUCount;
  621. }
  622. #if defined(__e2k__)
  623. inline const char *
  624. SDL_GetCPUType(void)
  625. {
  626. static char SDL_CPUType[13];
  627. SDL_strlcpy(SDL_CPUType, "E2K MACHINE", sizeof(SDL_CPUType));
  628. return SDL_CPUType;
  629. }
  630. #else
  631. /* Oh, such a sweet sweet trick, just not very useful. :) */
  632. static const char *
  633. SDL_GetCPUType(void)
  634. {
  635. static char SDL_CPUType[13];
  636. if (!SDL_CPUType[0]) {
  637. int i = 0;
  638. CPU_calcCPUIDFeatures();
  639. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  640. int a, b, c, d;
  641. cpuid(0x00000000, a, b, c, d);
  642. (void) a;
  643. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  644. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  645. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  646. SDL_CPUType[i++] = (char)(b & 0xff);
  647. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  648. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  649. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  650. SDL_CPUType[i++] = (char)(d & 0xff);
  651. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  652. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  653. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  654. SDL_CPUType[i++] = (char)(c & 0xff);
  655. }
  656. if (!SDL_CPUType[0]) {
  657. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  658. }
  659. }
  660. return SDL_CPUType;
  661. }
  662. #endif
  663. #ifdef TEST_MAIN /* !!! FIXME: only used for test at the moment. */
  664. #if defined(__e2k__)
  665. inline const char *
  666. SDL_GetCPUName(void)
  667. {
  668. static char SDL_CPUName[48];
  669. SDL_strlcpy(SDL_CPUName, __builtin_cpu_name(), sizeof(SDL_CPUName));
  670. return SDL_CPUName;
  671. }
  672. #else
  673. static const char *
  674. SDL_GetCPUName(void)
  675. {
  676. static char SDL_CPUName[48];
  677. if (!SDL_CPUName[0]) {
  678. int i = 0;
  679. int a, b, c, d;
  680. CPU_calcCPUIDFeatures();
  681. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  682. cpuid(0x80000000, a, b, c, d);
  683. if (a >= 0x80000004) {
  684. cpuid(0x80000002, a, b, c, d);
  685. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  686. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  687. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  688. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  689. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  690. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  691. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  692. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  693. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  694. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  695. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  696. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  697. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  698. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  699. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  700. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  701. cpuid(0x80000003, a, b, c, d);
  702. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  703. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  704. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  705. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  706. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  707. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  708. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  709. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  710. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  711. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  712. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  713. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  714. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  715. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  716. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  717. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  718. cpuid(0x80000004, a, b, c, d);
  719. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  720. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  721. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  722. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  723. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  724. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  725. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  726. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  727. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  728. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  729. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  730. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  731. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  732. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  733. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  734. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  735. }
  736. }
  737. if (!SDL_CPUName[0]) {
  738. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  739. }
  740. }
  741. return SDL_CPUName;
  742. }
  743. #endif
  744. #endif
  745. int
  746. SDL_GetCPUCacheLineSize(void)
  747. {
  748. const char *cpuType = SDL_GetCPUType();
  749. int a, b, c, d;
  750. (void) a; (void) b; (void) c; (void) d;
  751. if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
  752. cpuid(0x00000001, a, b, c, d);
  753. return (((b >> 8) & 0xff) * 8);
  754. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  755. cpuid(0x80000005, a, b, c, d);
  756. return (c & 0xff);
  757. } else {
  758. /* Just make a guess here... */
  759. return SDL_CACHELINE_SIZE;
  760. }
  761. }
  762. static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
  763. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  764. static Uint32
  765. SDL_GetCPUFeatures(void)
  766. {
  767. if (SDL_CPUFeatures == 0xFFFFFFFF) {
  768. CPU_calcCPUIDFeatures();
  769. SDL_CPUFeatures = 0;
  770. SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
  771. if (CPU_haveRDTSC()) {
  772. SDL_CPUFeatures |= CPU_HAS_RDTSC;
  773. }
  774. if (CPU_haveAltiVec()) {
  775. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  776. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  777. }
  778. if (CPU_haveMMX()) {
  779. SDL_CPUFeatures |= CPU_HAS_MMX;
  780. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  781. }
  782. if (CPU_have3DNow()) {
  783. SDL_CPUFeatures |= CPU_HAS_3DNOW;
  784. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  785. }
  786. if (CPU_haveSSE()) {
  787. SDL_CPUFeatures |= CPU_HAS_SSE;
  788. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  789. }
  790. if (CPU_haveSSE2()) {
  791. SDL_CPUFeatures |= CPU_HAS_SSE2;
  792. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  793. }
  794. if (CPU_haveSSE3()) {
  795. SDL_CPUFeatures |= CPU_HAS_SSE3;
  796. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  797. }
  798. if (CPU_haveSSE41()) {
  799. SDL_CPUFeatures |= CPU_HAS_SSE41;
  800. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  801. }
  802. if (CPU_haveSSE42()) {
  803. SDL_CPUFeatures |= CPU_HAS_SSE42;
  804. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  805. }
  806. if (CPU_haveAVX()) {
  807. SDL_CPUFeatures |= CPU_HAS_AVX;
  808. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  809. }
  810. if (CPU_haveAVX2()) {
  811. SDL_CPUFeatures |= CPU_HAS_AVX2;
  812. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  813. }
  814. if (CPU_haveAVX512F()) {
  815. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  816. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  817. }
  818. if (CPU_haveARMSIMD()) {
  819. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  820. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  821. }
  822. if (CPU_haveNEON()) {
  823. SDL_CPUFeatures |= CPU_HAS_NEON;
  824. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  825. }
  826. }
  827. return SDL_CPUFeatures;
  828. }
  829. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
  830. SDL_bool SDL_HasRDTSC(void)
  831. {
  832. return CPU_FEATURE_AVAILABLE(CPU_HAS_RDTSC);
  833. }
  834. SDL_bool
  835. SDL_HasAltiVec(void)
  836. {
  837. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  838. }
  839. SDL_bool
  840. SDL_HasMMX(void)
  841. {
  842. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  843. }
  844. SDL_bool
  845. SDL_Has3DNow(void)
  846. {
  847. return CPU_FEATURE_AVAILABLE(CPU_HAS_3DNOW);
  848. }
  849. SDL_bool
  850. SDL_HasSSE(void)
  851. {
  852. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  853. }
  854. SDL_bool
  855. SDL_HasSSE2(void)
  856. {
  857. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  858. }
  859. SDL_bool
  860. SDL_HasSSE3(void)
  861. {
  862. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  863. }
  864. SDL_bool
  865. SDL_HasSSE41(void)
  866. {
  867. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  868. }
  869. SDL_bool
  870. SDL_HasSSE42(void)
  871. {
  872. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  873. }
  874. SDL_bool
  875. SDL_HasAVX(void)
  876. {
  877. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  878. }
  879. SDL_bool
  880. SDL_HasAVX2(void)
  881. {
  882. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  883. }
  884. SDL_bool
  885. SDL_HasAVX512F(void)
  886. {
  887. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  888. }
  889. SDL_bool
  890. SDL_HasARMSIMD(void)
  891. {
  892. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  893. }
  894. SDL_bool
  895. SDL_HasNEON(void)
  896. {
  897. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  898. }
  899. static int SDL_SystemRAM = 0;
  900. int
  901. SDL_GetSystemRAM(void)
  902. {
  903. if (!SDL_SystemRAM) {
  904. #ifndef SDL_CPUINFO_DISABLED
  905. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  906. if (SDL_SystemRAM <= 0) {
  907. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024*1024));
  908. }
  909. #endif
  910. #ifdef HAVE_SYSCTLBYNAME
  911. if (SDL_SystemRAM <= 0) {
  912. #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__DragonFly__)
  913. #ifdef HW_REALMEM
  914. int mib[2] = {CTL_HW, HW_REALMEM};
  915. #else
  916. /* might only report up to 2 GiB */
  917. int mib[2] = {CTL_HW, HW_PHYSMEM};
  918. #endif /* HW_REALMEM */
  919. #else
  920. int mib[2] = {CTL_HW, HW_MEMSIZE};
  921. #endif /* __FreeBSD__ || __FreeBSD_kernel__ */
  922. Uint64 memsize = 0;
  923. size_t len = sizeof(memsize);
  924. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  925. SDL_SystemRAM = (int)(memsize / (1024*1024));
  926. }
  927. }
  928. #endif
  929. #ifdef __WIN32__
  930. if (SDL_SystemRAM <= 0) {
  931. MEMORYSTATUSEX stat;
  932. stat.dwLength = sizeof(stat);
  933. if (GlobalMemoryStatusEx(&stat)) {
  934. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  935. }
  936. }
  937. #endif
  938. #ifdef __OS2__
  939. if (SDL_SystemRAM <= 0) {
  940. Uint32 sysram = 0;
  941. DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
  942. SDL_SystemRAM = (int) (sysram / 0x100000U);
  943. }
  944. #endif
  945. #ifdef __RISCOS__
  946. if (SDL_SystemRAM <= 0) {
  947. _kernel_swi_regs regs;
  948. regs.r[0] = 0x108;
  949. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  950. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  951. }
  952. }
  953. #endif
  954. #ifdef __VITA__
  955. if (SDL_SystemRAM <= 0) {
  956. /* Vita has 512MiB on SoC, that's split into 256MiB(+109MiB in extended memory mode) for app
  957. +26MiB of physically continuous memory, +112MiB of CDRAM(VRAM) + system reserved memory. */
  958. SDL_SystemRAM = 536870912;
  959. }
  960. #endif
  961. #endif
  962. }
  963. return SDL_SystemRAM;
  964. }
  965. size_t
  966. SDL_SIMDGetAlignment(void)
  967. {
  968. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  969. SDL_GetCPUFeatures(); /* make sure this has been calculated */
  970. }
  971. SDL_assert(SDL_SIMDAlignment != 0);
  972. return SDL_SIMDAlignment;
  973. }
  974. void *
  975. SDL_SIMDAlloc(const size_t len)
  976. {
  977. const size_t alignment = SDL_SIMDGetAlignment();
  978. const size_t padding = alignment - (len % alignment);
  979. const size_t padded = (padding != alignment) ? (len + padding) : len;
  980. Uint8 *retval = NULL;
  981. Uint8 *ptr = (Uint8 *) SDL_malloc(padded + alignment + sizeof (void *));
  982. if (ptr) {
  983. /* store the actual malloc pointer right before our aligned pointer. */
  984. retval = ptr + sizeof (void *);
  985. retval += alignment - (((size_t) retval) % alignment);
  986. *(((void **) retval) - 1) = ptr;
  987. }
  988. return retval;
  989. }
  990. void *
  991. SDL_SIMDRealloc(void *mem, const size_t len)
  992. {
  993. const size_t alignment = SDL_SIMDGetAlignment();
  994. const size_t padding = alignment - (len % alignment);
  995. const size_t padded = (padding != alignment) ? (len + padding) : len;
  996. Uint8 *retval = (Uint8*) mem;
  997. void *oldmem = mem;
  998. size_t memdiff = 0, ptrdiff;
  999. Uint8 *ptr;
  1000. if (mem) {
  1001. void **realptr = (void **) mem;
  1002. realptr--;
  1003. mem = *(((void **) mem) - 1);
  1004. /* Check the delta between the real pointer and user pointer */
  1005. memdiff = ((size_t) oldmem) - ((size_t) mem);
  1006. }
  1007. ptr = (Uint8 *) SDL_realloc(mem, padded + alignment + sizeof (void *));
  1008. if (ptr == NULL) {
  1009. return NULL; /* Out of memory, bail! */
  1010. }
  1011. /* Store the actual malloc pointer right before our aligned pointer. */
  1012. retval = ptr + sizeof (void *);
  1013. retval += alignment - (((size_t) retval) % alignment);
  1014. /* Make sure the delta is the same! */
  1015. if (mem) {
  1016. ptrdiff = ((size_t) retval) - ((size_t) ptr);
  1017. if (memdiff != ptrdiff) { /* Delta has changed, copy to new offset! */
  1018. oldmem = (void*) (((uintptr_t) ptr) + memdiff);
  1019. /* Even though the data past the old `len` is undefined, this is the
  1020. * only length value we have, and it guarantees that we copy all the
  1021. * previous memory anyhow.
  1022. */
  1023. SDL_memmove(retval, oldmem, len);
  1024. }
  1025. }
  1026. /* Actually store the malloc pointer, finally. */
  1027. *(((void **) retval) - 1) = ptr;
  1028. return retval;
  1029. }
  1030. void
  1031. SDL_SIMDFree(void *ptr)
  1032. {
  1033. if (ptr) {
  1034. void **realptr = (void **) ptr;
  1035. realptr--;
  1036. SDL_free(*(((void **) ptr) - 1));
  1037. }
  1038. }
  1039. #ifdef TEST_MAIN
  1040. #include <stdio.h>
  1041. int
  1042. main()
  1043. {
  1044. printf("CPU count: %d\n", SDL_GetCPUCount());
  1045. printf("CPU type: %s\n", SDL_GetCPUType());
  1046. printf("CPU name: %s\n", SDL_GetCPUName());
  1047. printf("CacheLine size: %d\n", SDL_GetCPUCacheLineSize());
  1048. printf("RDTSC: %d\n", SDL_HasRDTSC());
  1049. printf("Altivec: %d\n", SDL_HasAltiVec());
  1050. printf("MMX: %d\n", SDL_HasMMX());
  1051. printf("3DNow: %d\n", SDL_Has3DNow());
  1052. printf("SSE: %d\n", SDL_HasSSE());
  1053. printf("SSE2: %d\n", SDL_HasSSE2());
  1054. printf("SSE3: %d\n", SDL_HasSSE3());
  1055. printf("SSE4.1: %d\n", SDL_HasSSE41());
  1056. printf("SSE4.2: %d\n", SDL_HasSSE42());
  1057. printf("AVX: %d\n", SDL_HasAVX());
  1058. printf("AVX2: %d\n", SDL_HasAVX2());
  1059. printf("AVX-512F: %d\n", SDL_HasAVX512F());
  1060. printf("ARM SIMD: %d\n", SDL_HasARMSIMD());
  1061. printf("NEON: %d\n", SDL_HasNEON());
  1062. printf("RAM: %d MB\n", SDL_GetSystemRAM());
  1063. return 0;
  1064. }
  1065. #endif /* TEST_MAIN */
  1066. /* vi: set ts=4 sw=4 expandtab: */