SDL_cpuinfo.c 36 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2024 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #include "SDL_internal.h"
  19. #include "SDL_cpuinfo_c.h"
  20. #if defined(SDL_PLATFORM_WIN32) || defined(SDL_PLATFORM_WINRT) || defined(SDL_PLATFORM_GDK)
  21. #include "../core/windows/SDL_windows.h"
  22. #endif
  23. /* CPU feature detection for SDL */
  24. #ifdef HAVE_SYSCONF
  25. #include <unistd.h>
  26. #endif
  27. #ifdef HAVE_SYSCTLBYNAME
  28. #include <sys/types.h>
  29. #include <sys/sysctl.h>
  30. #endif
  31. #if defined(SDL_PLATFORM_MACOS) && (defined(__ppc__) || defined(__ppc64__))
  32. #include <sys/sysctl.h> /* For AltiVec check */
  33. #elif defined(SDL_PLATFORM_OPENBSD) && defined(__powerpc__)
  34. #include <sys/types.h>
  35. #include <sys/sysctl.h> /* For AltiVec check */
  36. #include <machine/cpu.h>
  37. #elif defined(SDL_PLATFORM_FREEBSD) && defined(__powerpc__)
  38. #include <machine/cpu.h>
  39. #include <sys/auxv.h>
  40. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  41. #include <signal.h>
  42. #include <setjmp.h>
  43. #endif
  44. #if (defined(SDL_PLATFORM_LINUX) || defined(SDL_PLATFORM_ANDROID)) && defined(__arm__)
  45. #include <unistd.h>
  46. #include <sys/types.h>
  47. #include <sys/stat.h>
  48. #include <fcntl.h>
  49. #include <elf.h>
  50. /*#include <asm/hwcap.h>*/
  51. #ifndef AT_HWCAP
  52. #define AT_HWCAP 16
  53. #endif
  54. #ifndef AT_PLATFORM
  55. #define AT_PLATFORM 15
  56. #endif
  57. #ifndef HWCAP_NEON
  58. #define HWCAP_NEON (1 << 12)
  59. #endif
  60. #endif
  61. #if defined(SDL_PLATFORM_ANDROID) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  62. #include <cpu-features.h>
  63. #endif
  64. #if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
  65. #include <sys/auxv.h>
  66. #endif
  67. #ifdef SDL_PLATFORM_RISCOS
  68. #include <kernel.h>
  69. #include <swis.h>
  70. #endif
  71. #ifdef SDL_PLATFORM_PS2
  72. #include <kernel.h>
  73. #endif
  74. #ifdef SDL_PLATFORM_HAIKU
  75. #include <kernel/OS.h>
  76. #endif
  77. #define CPU_HAS_ALTIVEC (1 << 0)
  78. #define CPU_HAS_MMX (1 << 1)
  79. #define CPU_HAS_SSE (1 << 2)
  80. #define CPU_HAS_SSE2 (1 << 3)
  81. #define CPU_HAS_SSE3 (1 << 4)
  82. #define CPU_HAS_SSE41 (1 << 5)
  83. #define CPU_HAS_SSE42 (1 << 6)
  84. #define CPU_HAS_AVX (1 << 7)
  85. #define CPU_HAS_AVX2 (1 << 8)
  86. #define CPU_HAS_NEON (1 << 9)
  87. #define CPU_HAS_AVX512F (1 << 10)
  88. #define CPU_HAS_ARM_SIMD (1 << 11)
  89. #define CPU_HAS_LSX (1 << 12)
  90. #define CPU_HAS_LASX (1 << 13)
  91. #define CPU_CFG2 0x2
  92. #define CPU_CFG2_LSX (1 << 6)
  93. #define CPU_CFG2_LASX (1 << 7)
  94. #if defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP) && !defined(SDL_PLATFORM_MACOS) && !defined(SDL_PLATFORM_OPENBSD) && !defined(SDL_PLATFORM_FREEBSD)
  95. /* This is the brute force way of detecting instruction sets...
  96. the idea is borrowed from the libmpeg2 library - thanks!
  97. */
  98. static jmp_buf jmpbuf;
  99. static void illegal_instruction(int sig)
  100. {
  101. longjmp(jmpbuf, 1);
  102. }
  103. #endif /* HAVE_SETJMP */
  104. static int CPU_haveCPUID(void)
  105. {
  106. int has_CPUID = 0;
  107. /* *INDENT-OFF* */ /* clang-format off */
  108. #ifndef SDL_PLATFORM_EMSCRIPTEN
  109. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  110. __asm__ (
  111. " pushfl # Get original EFLAGS \n"
  112. " popl %%eax \n"
  113. " movl %%eax,%%ecx \n"
  114. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  115. " pushl %%eax # Save new EFLAGS value on stack \n"
  116. " popfl # Replace current EFLAGS value \n"
  117. " pushfl # Get new EFLAGS \n"
  118. " popl %%eax # Store new EFLAGS in EAX \n"
  119. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  120. " jz 1f # Processor=80486 \n"
  121. " movl $1,%0 # We have CPUID support \n"
  122. "1: \n"
  123. : "=m" (has_CPUID)
  124. :
  125. : "%eax", "%ecx"
  126. );
  127. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  128. /* Technically, if this is being compiled under __x86_64__ then it has
  129. CPUid by definition. But it's nice to be able to prove it. :) */
  130. __asm__ (
  131. " pushfq # Get original EFLAGS \n"
  132. " popq %%rax \n"
  133. " movq %%rax,%%rcx \n"
  134. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  135. " pushq %%rax # Save new EFLAGS value on stack \n"
  136. " popfq # Replace current EFLAGS value \n"
  137. " pushfq # Get new EFLAGS \n"
  138. " popq %%rax # Store new EFLAGS in EAX \n"
  139. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  140. " jz 1f # Processor=80486 \n"
  141. " movl $1,%0 # We have CPUID support \n"
  142. "1: \n"
  143. : "=m" (has_CPUID)
  144. :
  145. : "%rax", "%rcx"
  146. );
  147. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  148. __asm {
  149. pushfd ; Get original EFLAGS
  150. pop eax
  151. mov ecx, eax
  152. xor eax, 200000h ; Flip ID bit in EFLAGS
  153. push eax ; Save new EFLAGS value on stack
  154. popfd ; Replace current EFLAGS value
  155. pushfd ; Get new EFLAGS
  156. pop eax ; Store new EFLAGS in EAX
  157. xor eax, ecx ; Can not toggle ID bit,
  158. jz done ; Processor=80486
  159. mov has_CPUID,1 ; We have CPUID support
  160. done:
  161. }
  162. #elif defined(_MSC_VER) && defined(_M_X64)
  163. has_CPUID = 1;
  164. #elif defined(__sun) && defined(__i386)
  165. __asm (
  166. " pushfl \n"
  167. " popl %eax \n"
  168. " movl %eax,%ecx \n"
  169. " xorl $0x200000,%eax \n"
  170. " pushl %eax \n"
  171. " popfl \n"
  172. " pushfl \n"
  173. " popl %eax \n"
  174. " xorl %ecx,%eax \n"
  175. " jz 1f \n"
  176. " movl $1,-8(%ebp) \n"
  177. "1: \n"
  178. );
  179. #elif defined(__sun) && defined(__amd64)
  180. __asm (
  181. " pushfq \n"
  182. " popq %rax \n"
  183. " movq %rax,%rcx \n"
  184. " xorl $0x200000,%eax \n"
  185. " pushq %rax \n"
  186. " popfq \n"
  187. " pushfq \n"
  188. " popq %rax \n"
  189. " xorl %ecx,%eax \n"
  190. " jz 1f \n"
  191. " movl $1,-8(%rbp) \n"
  192. "1: \n"
  193. );
  194. #endif
  195. #endif /* !SDL_PLATFORM_EMSCRIPTEN */
  196. /* *INDENT-ON* */ /* clang-format on */
  197. return has_CPUID;
  198. }
  199. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  200. #define cpuid(func, a, b, c, d) \
  201. __asm__ __volatile__( \
  202. " pushl %%ebx \n" \
  203. " xorl %%ecx,%%ecx \n" \
  204. " cpuid \n" \
  205. " movl %%ebx, %%esi \n" \
  206. " popl %%ebx \n" \
  207. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  208. : "a"(func))
  209. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  210. #define cpuid(func, a, b, c, d) \
  211. __asm__ __volatile__( \
  212. " pushq %%rbx \n" \
  213. " xorq %%rcx,%%rcx \n" \
  214. " cpuid \n" \
  215. " movq %%rbx, %%rsi \n" \
  216. " popq %%rbx \n" \
  217. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  218. : "a"(func))
  219. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  220. #define cpuid(func, a, b, c, d) \
  221. __asm { \
  222. __asm mov eax, func \
  223. __asm xor ecx, ecx \
  224. __asm cpuid \
  225. __asm mov a, eax \
  226. __asm mov b, ebx \
  227. __asm mov c, ecx \
  228. __asm mov d, edx \
  229. }
  230. #elif (defined(_MSC_VER) && defined(_M_X64))
  231. /* Use __cpuidex instead of __cpuid because ICL does not clear ecx register */
  232. #define cpuid(func, a, b, c, d) \
  233. { \
  234. int CPUInfo[4]; \
  235. __cpuidex(CPUInfo, func, 0); \
  236. a = CPUInfo[0]; \
  237. b = CPUInfo[1]; \
  238. c = CPUInfo[2]; \
  239. d = CPUInfo[3]; \
  240. }
  241. #else
  242. #define cpuid(func, a, b, c, d) \
  243. do { \
  244. a = b = c = d = 0; \
  245. (void)a; \
  246. (void)b; \
  247. (void)c; \
  248. (void)d; \
  249. } while (0)
  250. #endif
  251. static int CPU_CPUIDFeatures[4];
  252. static int CPU_CPUIDMaxFunction = 0;
  253. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  254. static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
  255. static void CPU_calcCPUIDFeatures(void)
  256. {
  257. static SDL_bool checked = SDL_FALSE;
  258. if (!checked) {
  259. checked = SDL_TRUE;
  260. if (CPU_haveCPUID()) {
  261. int a, b, c, d;
  262. cpuid(0, a, b, c, d);
  263. CPU_CPUIDMaxFunction = a;
  264. if (CPU_CPUIDMaxFunction >= 1) {
  265. cpuid(1, a, b, c, d);
  266. CPU_CPUIDFeatures[0] = a;
  267. CPU_CPUIDFeatures[1] = b;
  268. CPU_CPUIDFeatures[2] = c;
  269. CPU_CPUIDFeatures[3] = d;
  270. /* Check to make sure we can call xgetbv */
  271. if (c & 0x08000000) {
  272. /* Call xgetbv to see if YMM (etc) register state is saved */
  273. #if (defined(__GNUC__) || defined(__llvm__)) && (defined(__i386__) || defined(__x86_64__))
  274. __asm__(".byte 0x0f, 0x01, 0xd0"
  275. : "=a"(a)
  276. : "c"(0)
  277. : "%edx");
  278. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  279. a = (int)_xgetbv(0);
  280. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  281. __asm
  282. {
  283. xor ecx, ecx
  284. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  285. mov a, eax
  286. }
  287. #endif
  288. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  289. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
  290. }
  291. }
  292. }
  293. }
  294. }
  295. static int CPU_haveAltiVec(void)
  296. {
  297. volatile int altivec = 0;
  298. #ifndef SDL_CPUINFO_DISABLED
  299. #if (defined(SDL_PLATFORM_MACOS) && (defined(__ppc__) || defined(__ppc64__))) || (defined(SDL_PLATFORM_OPENBSD) && defined(__powerpc__))
  300. #ifdef SDL_PLATFORM_OPENBSD
  301. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  302. #else
  303. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  304. #endif
  305. int hasVectorUnit = 0;
  306. size_t length = sizeof(hasVectorUnit);
  307. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  308. if (0 == error) {
  309. altivec = (hasVectorUnit != 0);
  310. }
  311. #elif defined(SDL_PLATFORM_FREEBSD) && defined(__powerpc__)
  312. unsigned long cpufeatures = 0;
  313. elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures));
  314. altivec = cpufeatures & PPC_FEATURE_HAS_ALTIVEC;
  315. return altivec;
  316. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  317. void (*handler)(int sig);
  318. handler = signal(SIGILL, illegal_instruction);
  319. if (setjmp(jmpbuf) == 0) {
  320. asm volatile("mtspr 256, %0\n\t"
  321. "vand %%v0, %%v0, %%v0" ::"r"(-1));
  322. altivec = 1;
  323. }
  324. signal(SIGILL, handler);
  325. #endif
  326. #endif
  327. return altivec;
  328. }
  329. #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) || defined(__aarch64__)
  330. static int CPU_haveARMSIMD(void)
  331. {
  332. return 1;
  333. }
  334. #elif !defined(__arm__)
  335. static int CPU_haveARMSIMD(void)
  336. {
  337. return 0;
  338. }
  339. #elif defined(SDL_PLATFORM_LINUX)
  340. static int CPU_haveARMSIMD(void)
  341. {
  342. int arm_simd = 0;
  343. int fd;
  344. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  345. if (fd >= 0) {
  346. Elf32_auxv_t aux;
  347. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  348. if (aux.a_type == AT_PLATFORM) {
  349. const char *plat = (const char *)aux.a_un.a_val;
  350. if (plat) {
  351. arm_simd = SDL_strncmp(plat, "v6l", 3) == 0 ||
  352. SDL_strncmp(plat, "v7l", 3) == 0;
  353. }
  354. }
  355. }
  356. close(fd);
  357. }
  358. return arm_simd;
  359. }
  360. #elif defined(SDL_PLATFORM_RISCOS)
  361. static int CPU_haveARMSIMD(void)
  362. {
  363. _kernel_swi_regs regs;
  364. regs.r[0] = 0;
  365. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  366. return 0;
  367. }
  368. if (!(regs.r[0] & (1 << 31))) {
  369. return 0;
  370. }
  371. regs.r[0] = 34;
  372. regs.r[1] = 29;
  373. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  374. return 0;
  375. }
  376. return regs.r[0];
  377. }
  378. #else
  379. static int CPU_haveARMSIMD(void)
  380. {
  381. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  382. return 0;
  383. }
  384. #endif
  385. #if defined(SDL_PLATFORM_LINUX) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  386. static int readProcAuxvForNeon(void)
  387. {
  388. int neon = 0;
  389. int fd;
  390. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  391. if (fd >= 0) {
  392. Elf32_auxv_t aux;
  393. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  394. if (aux.a_type == AT_HWCAP) {
  395. neon = (aux.a_un.a_val & HWCAP_NEON) == HWCAP_NEON;
  396. break;
  397. }
  398. }
  399. close(fd);
  400. }
  401. return neon;
  402. }
  403. #endif
  404. static int CPU_haveNEON(void)
  405. {
  406. /* The way you detect NEON is a privileged instruction on ARM, so you have
  407. query the OS kernel in a platform-specific way. :/ */
  408. #if defined(SDL_PLATFORM_WINDOWS) && (defined(_M_ARM) || defined(_M_ARM64))
  409. /* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
  410. /* Seems to have been removed */
  411. #ifndef PF_ARM_NEON_INSTRUCTIONS_AVAILABLE
  412. #define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  413. #endif
  414. /* All WinRT ARM devices are required to support NEON, but just in case. */
  415. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  416. #elif (defined(__ARM_ARCH) && (__ARM_ARCH >= 8)) || defined(__aarch64__)
  417. return 1; /* ARMv8 always has non-optional NEON support. */
  418. #elif defined(SDL_PLATFORM_VITA)
  419. return 1;
  420. #elif defined(SDL_PLATFORM_3DS)
  421. return 0;
  422. #elif defined(SDL_PLATFORM_APPLE) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  423. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  424. return 1; /* all Apple ARMv7 chips and later have NEON. */
  425. #elif defined(SDL_PLATFORM_APPLE)
  426. return 0; /* assume anything else from Apple doesn't have NEON. */
  427. #elif !defined(__arm__)
  428. return 0; /* not an ARM CPU at all. */
  429. #elif defined(SDL_PLATFORM_OPENBSD)
  430. return 1; /* OpenBSD only supports ARMv7 CPUs that have NEON. */
  431. #elif defined(HAVE_ELF_AUX_INFO)
  432. unsigned long hasneon = 0;
  433. if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0) {
  434. return 0;
  435. }
  436. return (hasneon & HWCAP_NEON) == HWCAP_NEON;
  437. #elif (defined(SDL_PLATFORM_LINUX) || defined(SDL_PLATFORM_ANDROID)) && defined(HAVE_GETAUXVAL)
  438. return (getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON;
  439. #elif defined(SDL_PLATFORM_LINUX)
  440. return readProcAuxvForNeon();
  441. #elif defined(SDL_PLATFORM_ANDROID)
  442. /* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
  443. {
  444. AndroidCpuFamily cpu_family = android_getCpuFamily();
  445. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  446. uint64_t cpu_features = android_getCpuFeatures();
  447. if (cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) {
  448. return 1;
  449. }
  450. }
  451. return 0;
  452. }
  453. #elif defined(SDL_PLATFORM_RISCOS)
  454. /* Use the VFPSupport_Features SWI to access the MVFR registers */
  455. {
  456. _kernel_swi_regs regs;
  457. regs.r[0] = 0;
  458. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  459. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  460. return 1;
  461. }
  462. }
  463. return 0;
  464. }
  465. #elif defined(SDL_PLATFORM_EMSCRIPTEN)
  466. return 0;
  467. #else
  468. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  469. return 0;
  470. #endif
  471. }
  472. static int CPU_readCPUCFG(void)
  473. {
  474. uint32_t cfg2 = 0;
  475. #if defined __loongarch__
  476. __asm__ volatile(
  477. "cpucfg %0, %1 \n\t"
  478. : "+&r"(cfg2)
  479. : "r"(CPU_CFG2));
  480. #endif
  481. return cfg2;
  482. }
  483. #define CPU_haveLSX() (CPU_readCPUCFG() & CPU_CFG2_LSX)
  484. #define CPU_haveLASX() (CPU_readCPUCFG() & CPU_CFG2_LASX)
  485. #ifdef __e2k__
  486. #ifdef __MMX__
  487. #define CPU_haveMMX() (1)
  488. #else
  489. #define CPU_haveMMX() (0)
  490. #endif
  491. #ifdef __SSE__
  492. #define CPU_haveSSE() (1)
  493. #else
  494. #define CPU_haveSSE() (0)
  495. #endif
  496. #ifdef __SSE2__
  497. #define CPU_haveSSE2() (1)
  498. #else
  499. #define CPU_haveSSE2() (0)
  500. #endif
  501. #ifdef __SSE3__
  502. #define CPU_haveSSE3() (1)
  503. #else
  504. #define CPU_haveSSE3() (0)
  505. #endif
  506. #ifdef __SSE4_1__
  507. #define CPU_haveSSE41() (1)
  508. #else
  509. #define CPU_haveSSE41() (0)
  510. #endif
  511. #ifdef __SSE4_2__
  512. #define CPU_haveSSE42() (1)
  513. #else
  514. #define CPU_haveSSE42() (0)
  515. #endif
  516. #ifdef __AVX__
  517. #define CPU_haveAVX() (1)
  518. #else
  519. #define CPU_haveAVX() (0)
  520. #endif
  521. #else
  522. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  523. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  524. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  525. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  526. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  527. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  528. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  529. #endif
  530. #ifdef __e2k__
  531. inline int
  532. CPU_haveAVX2(void)
  533. {
  534. #ifdef __AVX2__
  535. return 1;
  536. #else
  537. return 0;
  538. #endif
  539. }
  540. #else
  541. static int CPU_haveAVX2(void)
  542. {
  543. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  544. int a, b, c, d;
  545. (void)a;
  546. (void)b;
  547. (void)c;
  548. (void)d; /* compiler warnings... */
  549. cpuid(7, a, b, c, d);
  550. return b & 0x00000020;
  551. }
  552. return 0;
  553. }
  554. #endif
  555. #ifdef __e2k__
  556. inline int
  557. CPU_haveAVX512F(void)
  558. {
  559. return 0;
  560. }
  561. #else
  562. static int CPU_haveAVX512F(void)
  563. {
  564. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  565. int a, b, c, d;
  566. (void)a;
  567. (void)b;
  568. (void)c;
  569. (void)d; /* compiler warnings... */
  570. cpuid(7, a, b, c, d);
  571. return b & 0x00010000;
  572. }
  573. return 0;
  574. }
  575. #endif
  576. static int SDL_CPUCount = 0;
  577. int SDL_GetCPUCount(void)
  578. {
  579. if (!SDL_CPUCount) {
  580. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  581. if (SDL_CPUCount <= 0) {
  582. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  583. }
  584. #endif
  585. #ifdef HAVE_SYSCTLBYNAME
  586. if (SDL_CPUCount <= 0) {
  587. size_t size = sizeof(SDL_CPUCount);
  588. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  589. }
  590. #endif
  591. #if defined(SDL_PLATFORM_WIN32) || defined(SDL_PLATFORM_GDK)
  592. if (SDL_CPUCount <= 0) {
  593. SYSTEM_INFO info;
  594. GetSystemInfo(&info);
  595. SDL_CPUCount = info.dwNumberOfProcessors;
  596. }
  597. #endif
  598. /* There has to be at least 1, right? :) */
  599. if (SDL_CPUCount <= 0) {
  600. SDL_CPUCount = 1;
  601. }
  602. }
  603. return SDL_CPUCount;
  604. }
  605. #ifdef __e2k__
  606. inline const char *
  607. SDL_GetCPUType(void)
  608. {
  609. static char SDL_CPUType[13];
  610. SDL_strlcpy(SDL_CPUType, "E2K MACHINE", sizeof(SDL_CPUType));
  611. return SDL_CPUType;
  612. }
  613. #else
  614. /* Oh, such a sweet sweet trick, just not very useful. :) */
  615. static const char *SDL_GetCPUType(void)
  616. {
  617. static char SDL_CPUType[13];
  618. if (!SDL_CPUType[0]) {
  619. int i = 0;
  620. CPU_calcCPUIDFeatures();
  621. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  622. int a, b, c, d;
  623. cpuid(0x00000000, a, b, c, d);
  624. (void)a;
  625. SDL_CPUType[i++] = (char)(b & 0xff);
  626. b >>= 8;
  627. SDL_CPUType[i++] = (char)(b & 0xff);
  628. b >>= 8;
  629. SDL_CPUType[i++] = (char)(b & 0xff);
  630. b >>= 8;
  631. SDL_CPUType[i++] = (char)(b & 0xff);
  632. SDL_CPUType[i++] = (char)(d & 0xff);
  633. d >>= 8;
  634. SDL_CPUType[i++] = (char)(d & 0xff);
  635. d >>= 8;
  636. SDL_CPUType[i++] = (char)(d & 0xff);
  637. d >>= 8;
  638. SDL_CPUType[i++] = (char)(d & 0xff);
  639. SDL_CPUType[i++] = (char)(c & 0xff);
  640. c >>= 8;
  641. SDL_CPUType[i++] = (char)(c & 0xff);
  642. c >>= 8;
  643. SDL_CPUType[i++] = (char)(c & 0xff);
  644. c >>= 8;
  645. SDL_CPUType[i++] = (char)(c & 0xff);
  646. }
  647. if (!SDL_CPUType[0]) {
  648. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  649. }
  650. }
  651. return SDL_CPUType;
  652. }
  653. #endif
  654. #if 0
  655. !!! FIXME: Not used at the moment. */
  656. #ifdef __e2k__
  657. inline const char *
  658. SDL_GetCPUName(void)
  659. {
  660. static char SDL_CPUName[48];
  661. SDL_strlcpy(SDL_CPUName, __builtin_cpu_name(), sizeof(SDL_CPUName));
  662. return SDL_CPUName;
  663. }
  664. #else
  665. static const char *SDL_GetCPUName(void)
  666. {
  667. static char SDL_CPUName[48];
  668. if (!SDL_CPUName[0]) {
  669. int i = 0;
  670. int a, b, c, d;
  671. CPU_calcCPUIDFeatures();
  672. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  673. cpuid(0x80000000, a, b, c, d);
  674. if (a >= 0x80000004) {
  675. cpuid(0x80000002, a, b, c, d);
  676. SDL_CPUName[i++] = (char)(a & 0xff);
  677. a >>= 8;
  678. SDL_CPUName[i++] = (char)(a & 0xff);
  679. a >>= 8;
  680. SDL_CPUName[i++] = (char)(a & 0xff);
  681. a >>= 8;
  682. SDL_CPUName[i++] = (char)(a & 0xff);
  683. a >>= 8;
  684. SDL_CPUName[i++] = (char)(b & 0xff);
  685. b >>= 8;
  686. SDL_CPUName[i++] = (char)(b & 0xff);
  687. b >>= 8;
  688. SDL_CPUName[i++] = (char)(b & 0xff);
  689. b >>= 8;
  690. SDL_CPUName[i++] = (char)(b & 0xff);
  691. b >>= 8;
  692. SDL_CPUName[i++] = (char)(c & 0xff);
  693. c >>= 8;
  694. SDL_CPUName[i++] = (char)(c & 0xff);
  695. c >>= 8;
  696. SDL_CPUName[i++] = (char)(c & 0xff);
  697. c >>= 8;
  698. SDL_CPUName[i++] = (char)(c & 0xff);
  699. c >>= 8;
  700. SDL_CPUName[i++] = (char)(d & 0xff);
  701. d >>= 8;
  702. SDL_CPUName[i++] = (char)(d & 0xff);
  703. d >>= 8;
  704. SDL_CPUName[i++] = (char)(d & 0xff);
  705. d >>= 8;
  706. SDL_CPUName[i++] = (char)(d & 0xff);
  707. d >>= 8;
  708. cpuid(0x80000003, a, b, c, d);
  709. SDL_CPUName[i++] = (char)(a & 0xff);
  710. a >>= 8;
  711. SDL_CPUName[i++] = (char)(a & 0xff);
  712. a >>= 8;
  713. SDL_CPUName[i++] = (char)(a & 0xff);
  714. a >>= 8;
  715. SDL_CPUName[i++] = (char)(a & 0xff);
  716. a >>= 8;
  717. SDL_CPUName[i++] = (char)(b & 0xff);
  718. b >>= 8;
  719. SDL_CPUName[i++] = (char)(b & 0xff);
  720. b >>= 8;
  721. SDL_CPUName[i++] = (char)(b & 0xff);
  722. b >>= 8;
  723. SDL_CPUName[i++] = (char)(b & 0xff);
  724. b >>= 8;
  725. SDL_CPUName[i++] = (char)(c & 0xff);
  726. c >>= 8;
  727. SDL_CPUName[i++] = (char)(c & 0xff);
  728. c >>= 8;
  729. SDL_CPUName[i++] = (char)(c & 0xff);
  730. c >>= 8;
  731. SDL_CPUName[i++] = (char)(c & 0xff);
  732. c >>= 8;
  733. SDL_CPUName[i++] = (char)(d & 0xff);
  734. d >>= 8;
  735. SDL_CPUName[i++] = (char)(d & 0xff);
  736. d >>= 8;
  737. SDL_CPUName[i++] = (char)(d & 0xff);
  738. d >>= 8;
  739. SDL_CPUName[i++] = (char)(d & 0xff);
  740. d >>= 8;
  741. cpuid(0x80000004, a, b, c, d);
  742. SDL_CPUName[i++] = (char)(a & 0xff);
  743. a >>= 8;
  744. SDL_CPUName[i++] = (char)(a & 0xff);
  745. a >>= 8;
  746. SDL_CPUName[i++] = (char)(a & 0xff);
  747. a >>= 8;
  748. SDL_CPUName[i++] = (char)(a & 0xff);
  749. a >>= 8;
  750. SDL_CPUName[i++] = (char)(b & 0xff);
  751. b >>= 8;
  752. SDL_CPUName[i++] = (char)(b & 0xff);
  753. b >>= 8;
  754. SDL_CPUName[i++] = (char)(b & 0xff);
  755. b >>= 8;
  756. SDL_CPUName[i++] = (char)(b & 0xff);
  757. b >>= 8;
  758. SDL_CPUName[i++] = (char)(c & 0xff);
  759. c >>= 8;
  760. SDL_CPUName[i++] = (char)(c & 0xff);
  761. c >>= 8;
  762. SDL_CPUName[i++] = (char)(c & 0xff);
  763. c >>= 8;
  764. SDL_CPUName[i++] = (char)(c & 0xff);
  765. c >>= 8;
  766. SDL_CPUName[i++] = (char)(d & 0xff);
  767. d >>= 8;
  768. SDL_CPUName[i++] = (char)(d & 0xff);
  769. d >>= 8;
  770. SDL_CPUName[i++] = (char)(d & 0xff);
  771. d >>= 8;
  772. SDL_CPUName[i++] = (char)(d & 0xff);
  773. d >>= 8;
  774. }
  775. }
  776. if (!SDL_CPUName[0]) {
  777. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  778. }
  779. }
  780. return SDL_CPUName;
  781. }
  782. #endif
  783. #endif
  784. int SDL_GetCPUCacheLineSize(void)
  785. {
  786. const char *cpuType = SDL_GetCPUType();
  787. int a, b, c, d;
  788. (void)a;
  789. (void)b;
  790. (void)c;
  791. (void)d;
  792. if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
  793. cpuid(0x00000001, a, b, c, d);
  794. return ((b >> 8) & 0xff) * 8;
  795. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  796. cpuid(0x80000005, a, b, c, d);
  797. return c & 0xff;
  798. } else {
  799. /* Just make a guess here... */
  800. return SDL_CACHELINE_SIZE;
  801. }
  802. }
  803. #define SDL_CPUFEATURES_RESET_VALUE 0xFFFFFFFF
  804. static Uint32 SDL_CPUFeatures = SDL_CPUFEATURES_RESET_VALUE;
  805. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  806. static SDL_bool ref_string_equals(const char *ref, const char *test, const char *end_test) {
  807. size_t len_test = end_test - test;
  808. return SDL_strncmp(ref, test, len_test) == 0 && ref[len_test] == '\0' && (test[len_test] == '\0' || test[len_test] == ',');
  809. }
  810. static Uint32 SDLCALL SDL_CPUFeatureMaskFromHint(void)
  811. {
  812. Uint32 result_mask = SDL_CPUFEATURES_RESET_VALUE;
  813. const char *hint = SDL_GetHint(SDL_HINT_CPU_FEATURE_MASK);
  814. if (hint) {
  815. for (const char *spot = hint, *next; *spot; spot = next) {
  816. const char *end = SDL_strchr(spot, ',');
  817. Uint32 spot_mask;
  818. SDL_bool add_spot_mask = SDL_TRUE;
  819. if (end) {
  820. next = end + 1;
  821. } else {
  822. size_t len = SDL_strlen(spot);
  823. end = spot + len;
  824. next = end;
  825. }
  826. if (spot[0] == '+') {
  827. add_spot_mask = SDL_TRUE;
  828. spot += 1;
  829. } else if (spot[0] == '-') {
  830. add_spot_mask = SDL_FALSE;
  831. spot += 1;
  832. }
  833. if (ref_string_equals("all", spot, end)) {
  834. spot_mask = SDL_CPUFEATURES_RESET_VALUE;
  835. } else if (ref_string_equals("altivec", spot, end)) {
  836. spot_mask= CPU_HAS_ALTIVEC;
  837. } else if (ref_string_equals("mmx", spot, end)) {
  838. spot_mask = CPU_HAS_MMX;
  839. } else if (ref_string_equals("sse", spot, end)) {
  840. spot_mask = CPU_HAS_SSE;
  841. } else if (ref_string_equals("sse2", spot, end)) {
  842. spot_mask = CPU_HAS_SSE2;
  843. } else if (ref_string_equals("sse3", spot, end)) {
  844. spot_mask = CPU_HAS_SSE3;
  845. } else if (ref_string_equals("sse41", spot, end)) {
  846. spot_mask = CPU_HAS_SSE41;
  847. } else if (ref_string_equals("sse42", spot, end)) {
  848. spot_mask = CPU_HAS_SSE42;
  849. } else if (ref_string_equals("avx", spot, end)) {
  850. spot_mask = CPU_HAS_AVX;
  851. } else if (ref_string_equals("avx2", spot, end)) {
  852. spot_mask = CPU_HAS_AVX2;
  853. } else if (ref_string_equals("avx512f", spot, end)) {
  854. spot_mask = CPU_HAS_AVX512F;
  855. } else if (ref_string_equals("arm-simd", spot, end)) {
  856. spot_mask = CPU_HAS_ARM_SIMD;
  857. } else if (ref_string_equals("neon", spot, end)) {
  858. spot_mask = CPU_HAS_NEON;
  859. } else if (ref_string_equals("lsx", spot, end)) {
  860. spot_mask = CPU_HAS_LSX;
  861. } else if (ref_string_equals("lasx", spot, end)) {
  862. spot_mask = CPU_HAS_LASX;
  863. } else {
  864. /* Ignore unknown/incorrect cpu feature(s) */
  865. continue;
  866. }
  867. if (add_spot_mask) {
  868. result_mask |= spot_mask;
  869. } else {
  870. result_mask &= ~spot_mask;
  871. }
  872. }
  873. }
  874. return result_mask;
  875. }
  876. static Uint32 SDL_GetCPUFeatures(void)
  877. {
  878. if (SDL_CPUFeatures == SDL_CPUFEATURES_RESET_VALUE) {
  879. CPU_calcCPUIDFeatures();
  880. SDL_CPUFeatures = 0;
  881. SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
  882. if (CPU_haveAltiVec()) {
  883. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  884. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  885. }
  886. if (CPU_haveMMX()) {
  887. SDL_CPUFeatures |= CPU_HAS_MMX;
  888. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  889. }
  890. if (CPU_haveSSE()) {
  891. SDL_CPUFeatures |= CPU_HAS_SSE;
  892. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  893. }
  894. if (CPU_haveSSE2()) {
  895. SDL_CPUFeatures |= CPU_HAS_SSE2;
  896. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  897. }
  898. if (CPU_haveSSE3()) {
  899. SDL_CPUFeatures |= CPU_HAS_SSE3;
  900. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  901. }
  902. if (CPU_haveSSE41()) {
  903. SDL_CPUFeatures |= CPU_HAS_SSE41;
  904. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  905. }
  906. if (CPU_haveSSE42()) {
  907. SDL_CPUFeatures |= CPU_HAS_SSE42;
  908. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  909. }
  910. if (CPU_haveAVX()) {
  911. SDL_CPUFeatures |= CPU_HAS_AVX;
  912. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  913. }
  914. if (CPU_haveAVX2()) {
  915. SDL_CPUFeatures |= CPU_HAS_AVX2;
  916. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  917. }
  918. if (CPU_haveAVX512F()) {
  919. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  920. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  921. }
  922. if (CPU_haveARMSIMD()) {
  923. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  924. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  925. }
  926. if (CPU_haveNEON()) {
  927. SDL_CPUFeatures |= CPU_HAS_NEON;
  928. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  929. }
  930. if (CPU_haveLSX()) {
  931. SDL_CPUFeatures |= CPU_HAS_LSX;
  932. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  933. }
  934. if (CPU_haveLASX()) {
  935. SDL_CPUFeatures |= CPU_HAS_LASX;
  936. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  937. }
  938. SDL_CPUFeatures &= SDL_CPUFeatureMaskFromHint();
  939. }
  940. return SDL_CPUFeatures;
  941. }
  942. void SDL_QuitCPUInfo(void) {
  943. SDL_CPUFeatures = SDL_CPUFEATURES_RESET_VALUE;
  944. }
  945. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & (f)) ? SDL_TRUE : SDL_FALSE)
  946. SDL_bool SDL_HasAltiVec(void)
  947. {
  948. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  949. }
  950. SDL_bool SDL_HasMMX(void)
  951. {
  952. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  953. }
  954. SDL_bool SDL_HasSSE(void)
  955. {
  956. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  957. }
  958. SDL_bool SDL_HasSSE2(void)
  959. {
  960. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  961. }
  962. SDL_bool SDL_HasSSE3(void)
  963. {
  964. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  965. }
  966. SDL_bool SDL_HasSSE41(void)
  967. {
  968. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  969. }
  970. SDL_bool SDL_HasSSE42(void)
  971. {
  972. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  973. }
  974. SDL_bool SDL_HasAVX(void)
  975. {
  976. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  977. }
  978. SDL_bool SDL_HasAVX2(void)
  979. {
  980. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  981. }
  982. SDL_bool SDL_HasAVX512F(void)
  983. {
  984. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  985. }
  986. SDL_bool SDL_HasARMSIMD(void)
  987. {
  988. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  989. }
  990. SDL_bool SDL_HasNEON(void)
  991. {
  992. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  993. }
  994. SDL_bool SDL_HasLSX(void)
  995. {
  996. return CPU_FEATURE_AVAILABLE(CPU_HAS_LSX);
  997. }
  998. SDL_bool SDL_HasLASX(void)
  999. {
  1000. return CPU_FEATURE_AVAILABLE(CPU_HAS_LASX);
  1001. }
  1002. static int SDL_SystemRAM = 0;
  1003. int SDL_GetSystemRAM(void)
  1004. {
  1005. if (!SDL_SystemRAM) {
  1006. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  1007. if (SDL_SystemRAM <= 0) {
  1008. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024 * 1024));
  1009. }
  1010. #endif
  1011. #ifdef HAVE_SYSCTLBYNAME
  1012. if (SDL_SystemRAM <= 0) {
  1013. #ifdef HW_PHYSMEM64
  1014. /* (64-bit): NetBSD since 2003, OpenBSD */
  1015. int mib[2] = { CTL_HW, HW_PHYSMEM64 };
  1016. #elif defined(HW_REALMEM)
  1017. /* (64-bit): FreeBSD since 2005, DragonFly */
  1018. int mib[2] = { CTL_HW, HW_REALMEM };
  1019. #elif defined(HW_MEMSIZE)
  1020. /* (64-bit): Darwin */
  1021. int mib[2] = { CTL_HW, HW_MEMSIZE };
  1022. #else
  1023. /* (32-bit): very old BSD, might only report up to 2 GiB */
  1024. int mib[2] = { CTL_HW, HW_PHYSMEM };
  1025. #endif /* HW_PHYSMEM64 */
  1026. Uint64 memsize = 0;
  1027. size_t len = sizeof(memsize);
  1028. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  1029. SDL_SystemRAM = (int)(memsize / (1024 * 1024));
  1030. }
  1031. }
  1032. #endif
  1033. #if defined(SDL_PLATFORM_WIN32) || defined(SDL_PLATFORM_GDK)
  1034. if (SDL_SystemRAM <= 0) {
  1035. MEMORYSTATUSEX stat;
  1036. stat.dwLength = sizeof(stat);
  1037. if (GlobalMemoryStatusEx(&stat)) {
  1038. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  1039. }
  1040. }
  1041. #endif
  1042. #ifdef SDL_PLATFORM_RISCOS
  1043. if (SDL_SystemRAM <= 0) {
  1044. _kernel_swi_regs regs;
  1045. regs.r[0] = 0x108;
  1046. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  1047. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  1048. }
  1049. }
  1050. #endif
  1051. #ifdef SDL_PLATFORM_VITA
  1052. if (SDL_SystemRAM <= 0) {
  1053. /* Vita has 512MiB on SoC, that's split into 256MiB(+109MiB in extended memory mode) for app
  1054. +26MiB of physically continuous memory, +112MiB of CDRAM(VRAM) + system reserved memory. */
  1055. SDL_SystemRAM = 536870912;
  1056. }
  1057. #endif
  1058. #ifdef SDL_PLATFORM_PS2
  1059. if (SDL_SystemRAM <= 0) {
  1060. /* PlayStation 2 has 32MiB however there are some special models with 64 and 128 */
  1061. SDL_SystemRAM = GetMemorySize();
  1062. }
  1063. #endif
  1064. #ifdef SDL_PLATFORM_HAIKU
  1065. if (SDL_SystemRAM <= 0) {
  1066. system_info info;
  1067. if (get_system_info(&info) == B_OK) {
  1068. /* To have an accurate amount, we also take in account the inaccessible pages (aka ignored)
  1069. which is a bit handier compared to the legacy system's api (i.e. used_pages).*/
  1070. SDL_SystemRAM = (int)SDL_round((info.max_pages + info.ignored_pages > 0 ? info.ignored_pages : 0) * B_PAGE_SIZE / 1048576.0);
  1071. }
  1072. }
  1073. #endif
  1074. }
  1075. return SDL_SystemRAM;
  1076. }
  1077. size_t SDL_SIMDGetAlignment(void)
  1078. {
  1079. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  1080. SDL_GetCPUFeatures(); /* make sure this has been calculated */
  1081. }
  1082. SDL_assert(SDL_SIMDAlignment != 0);
  1083. return SDL_SIMDAlignment;
  1084. }