SDL_cpuinfo.c 24 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2017 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #ifdef TEST_MAIN
  19. #include "SDL_config.h"
  20. #else
  21. #include "../SDL_internal.h"
  22. #endif
  23. #if defined(__WIN32__)
  24. #include "../core/windows/SDL_windows.h"
  25. #endif
  26. /* CPU feature detection for SDL */
  27. #include "SDL_cpuinfo.h"
  28. #ifdef HAVE_SYSCONF
  29. #include <unistd.h>
  30. #endif
  31. #ifdef HAVE_SYSCTLBYNAME
  32. #include <sys/types.h>
  33. #include <sys/sysctl.h>
  34. #endif
  35. #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
  36. #include <sys/sysctl.h> /* For AltiVec check */
  37. #elif defined(__OpenBSD__) && defined(__powerpc__)
  38. #include <sys/param.h>
  39. #include <sys/sysctl.h> /* For AltiVec check */
  40. #include <machine/cpu.h>
  41. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  42. #include <signal.h>
  43. #include <setjmp.h>
  44. #endif
  45. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH)
  46. /*#include <asm/hwcap.h>*/
  47. #ifndef AT_HWCAP
  48. #define AT_HWCAP 16
  49. #endif
  50. #ifndef HWCAP_NEON
  51. #define HWCAP_NEON (1 << 12)
  52. #endif
  53. #if defined HAVE_GETAUXVAL
  54. #include <sys/auxv.h>
  55. #else
  56. #include <fcntl.h>
  57. #endif
  58. #endif
  59. #define CPU_HAS_RDTSC 0x00000001
  60. #define CPU_HAS_ALTIVEC 0x00000002
  61. #define CPU_HAS_MMX 0x00000004
  62. #define CPU_HAS_3DNOW 0x00000008
  63. #define CPU_HAS_SSE 0x00000010
  64. #define CPU_HAS_SSE2 0x00000020
  65. #define CPU_HAS_SSE3 0x00000040
  66. #define CPU_HAS_SSE41 0x00000100
  67. #define CPU_HAS_SSE42 0x00000200
  68. #define CPU_HAS_AVX 0x00000400
  69. #define CPU_HAS_AVX2 0x00000800
  70. #define CPU_HAS_NEON 0x00001000
  71. #if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__
  72. /* This is the brute force way of detecting instruction sets...
  73. the idea is borrowed from the libmpeg2 library - thanks!
  74. */
  75. static jmp_buf jmpbuf;
  76. static void
  77. illegal_instruction(int sig)
  78. {
  79. longjmp(jmpbuf, 1);
  80. }
  81. #endif /* HAVE_SETJMP */
  82. static int
  83. CPU_haveCPUID(void)
  84. {
  85. int has_CPUID = 0;
  86. /* *INDENT-OFF* */
  87. #ifndef SDL_CPUINFO_DISABLED
  88. #if defined(__GNUC__) && defined(i386)
  89. __asm__ (
  90. " pushfl # Get original EFLAGS \n"
  91. " popl %%eax \n"
  92. " movl %%eax,%%ecx \n"
  93. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  94. " pushl %%eax # Save new EFLAGS value on stack \n"
  95. " popfl # Replace current EFLAGS value \n"
  96. " pushfl # Get new EFLAGS \n"
  97. " popl %%eax # Store new EFLAGS in EAX \n"
  98. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  99. " jz 1f # Processor=80486 \n"
  100. " movl $1,%0 # We have CPUID support \n"
  101. "1: \n"
  102. : "=m" (has_CPUID)
  103. :
  104. : "%eax", "%ecx"
  105. );
  106. #elif defined(__GNUC__) && defined(__x86_64__)
  107. /* Technically, if this is being compiled under __x86_64__ then it has
  108. CPUid by definition. But it's nice to be able to prove it. :) */
  109. __asm__ (
  110. " pushfq # Get original EFLAGS \n"
  111. " popq %%rax \n"
  112. " movq %%rax,%%rcx \n"
  113. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  114. " pushq %%rax # Save new EFLAGS value on stack \n"
  115. " popfq # Replace current EFLAGS value \n"
  116. " pushfq # Get new EFLAGS \n"
  117. " popq %%rax # Store new EFLAGS in EAX \n"
  118. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  119. " jz 1f # Processor=80486 \n"
  120. " movl $1,%0 # We have CPUID support \n"
  121. "1: \n"
  122. : "=m" (has_CPUID)
  123. :
  124. : "%rax", "%rcx"
  125. );
  126. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  127. __asm {
  128. pushfd ; Get original EFLAGS
  129. pop eax
  130. mov ecx, eax
  131. xor eax, 200000h ; Flip ID bit in EFLAGS
  132. push eax ; Save new EFLAGS value on stack
  133. popfd ; Replace current EFLAGS value
  134. pushfd ; Get new EFLAGS
  135. pop eax ; Store new EFLAGS in EAX
  136. xor eax, ecx ; Can not toggle ID bit,
  137. jz done ; Processor=80486
  138. mov has_CPUID,1 ; We have CPUID support
  139. done:
  140. }
  141. #elif defined(_MSC_VER) && defined(_M_X64)
  142. has_CPUID = 1;
  143. #elif defined(__sun) && defined(__i386)
  144. __asm (
  145. " pushfl \n"
  146. " popl %eax \n"
  147. " movl %eax,%ecx \n"
  148. " xorl $0x200000,%eax \n"
  149. " pushl %eax \n"
  150. " popfl \n"
  151. " pushfl \n"
  152. " popl %eax \n"
  153. " xorl %ecx,%eax \n"
  154. " jz 1f \n"
  155. " movl $1,-8(%ebp) \n"
  156. "1: \n"
  157. );
  158. #elif defined(__sun) && defined(__amd64)
  159. __asm (
  160. " pushfq \n"
  161. " popq %rax \n"
  162. " movq %rax,%rcx \n"
  163. " xorl $0x200000,%eax \n"
  164. " pushq %rax \n"
  165. " popfq \n"
  166. " pushfq \n"
  167. " popq %rax \n"
  168. " xorl %ecx,%eax \n"
  169. " jz 1f \n"
  170. " movl $1,-8(%rbp) \n"
  171. "1: \n"
  172. );
  173. #endif
  174. #endif
  175. /* *INDENT-ON* */
  176. return has_CPUID;
  177. }
  178. #if defined(__GNUC__) && defined(i386)
  179. #define cpuid(func, a, b, c, d) \
  180. __asm__ __volatile__ ( \
  181. " pushl %%ebx \n" \
  182. " xorl %%ecx,%%ecx \n" \
  183. " cpuid \n" \
  184. " movl %%ebx, %%esi \n" \
  185. " popl %%ebx \n" : \
  186. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  187. #elif defined(__GNUC__) && defined(__x86_64__)
  188. #define cpuid(func, a, b, c, d) \
  189. __asm__ __volatile__ ( \
  190. " pushq %%rbx \n" \
  191. " xorq %%rcx,%%rcx \n" \
  192. " cpuid \n" \
  193. " movq %%rbx, %%rsi \n" \
  194. " popq %%rbx \n" : \
  195. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  196. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  197. #define cpuid(func, a, b, c, d) \
  198. __asm { \
  199. __asm mov eax, func \
  200. __asm xor ecx, ecx \
  201. __asm cpuid \
  202. __asm mov a, eax \
  203. __asm mov b, ebx \
  204. __asm mov c, ecx \
  205. __asm mov d, edx \
  206. }
  207. #elif defined(_MSC_VER) && defined(_M_X64)
  208. #define cpuid(func, a, b, c, d) \
  209. { \
  210. int CPUInfo[4]; \
  211. __cpuid(CPUInfo, func); \
  212. a = CPUInfo[0]; \
  213. b = CPUInfo[1]; \
  214. c = CPUInfo[2]; \
  215. d = CPUInfo[3]; \
  216. }
  217. #else
  218. #define cpuid(func, a, b, c, d) \
  219. do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
  220. #endif
  221. static int CPU_CPUIDFeatures[4];
  222. static int CPU_CPUIDMaxFunction = 0;
  223. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  224. static void
  225. CPU_calcCPUIDFeatures(void)
  226. {
  227. static SDL_bool checked = SDL_FALSE;
  228. if (!checked) {
  229. checked = SDL_TRUE;
  230. if (CPU_haveCPUID()) {
  231. int a, b, c, d;
  232. cpuid(0, a, b, c, d);
  233. CPU_CPUIDMaxFunction = a;
  234. if (CPU_CPUIDMaxFunction >= 1) {
  235. cpuid(1, a, b, c, d);
  236. CPU_CPUIDFeatures[0] = a;
  237. CPU_CPUIDFeatures[1] = b;
  238. CPU_CPUIDFeatures[2] = c;
  239. CPU_CPUIDFeatures[3] = d;
  240. /* Check to make sure we can call xgetbv */
  241. if (c & 0x08000000) {
  242. /* Call xgetbv to see if YMM register state is saved */
  243. #if defined(__GNUC__) && (defined(i386) || defined(__x86_64__))
  244. __asm__(".byte 0x0f, 0x01, 0xd0" : "=a" (a) : "c" (0) : "%edx");
  245. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  246. a = (int)_xgetbv(0);
  247. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  248. __asm
  249. {
  250. xor ecx, ecx
  251. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  252. mov a, eax
  253. }
  254. #endif
  255. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  256. }
  257. }
  258. }
  259. }
  260. }
  261. static int
  262. CPU_haveAltiVec(void)
  263. {
  264. volatile int altivec = 0;
  265. #ifndef SDL_CPUINFO_DISABLED
  266. #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))
  267. #ifdef __OpenBSD__
  268. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  269. #else
  270. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  271. #endif
  272. int hasVectorUnit = 0;
  273. size_t length = sizeof(hasVectorUnit);
  274. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  275. if (0 == error)
  276. altivec = (hasVectorUnit != 0);
  277. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  278. void (*handler) (int sig);
  279. handler = signal(SIGILL, illegal_instruction);
  280. if (setjmp(jmpbuf) == 0) {
  281. asm volatile ("mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::"r" (-1));
  282. altivec = 1;
  283. }
  284. signal(SIGILL, handler);
  285. #endif
  286. #endif
  287. return altivec;
  288. }
  289. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
  290. static int
  291. readProcAuxvForNeon(void)
  292. {
  293. int neon = 0;
  294. int kv[2];
  295. const int fd = open("/proc/self/auxv", O_RDONLY);
  296. if (fd != -1) {
  297. while (read(fd, kv, sizeof (kv)) == sizeof (kv)) {
  298. if (kv[0] == AT_HWCAP) {
  299. neon = ((kv[1] & HWCAP_NEON) == HWCAP_NEON);
  300. break;
  301. }
  302. }
  303. close(fd);
  304. }
  305. return neon;
  306. }
  307. #endif
  308. static int
  309. CPU_haveNEON(void)
  310. {
  311. /* The way you detect NEON is a privileged instruction on ARM, so you have
  312. query the OS kernel in a platform-specific way. :/ */
  313. #if defined(SDL_CPUINFO_DISABLED) || !defined(__ARM_ARCH)
  314. return 0; /* disabled or not an ARM CPU at all. */
  315. #elif __ARM_ARCH >= 8
  316. return 1; /* ARMv8 always has non-optional NEON support. */
  317. #elif defined(__APPLE__) && (__ARM_ARCH >= 7)
  318. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  319. return 1; /* all Apple ARMv7 chips and later have NEON. */
  320. #elif defined(__APPLE__)
  321. return 0; /* assune anything else from Apple doesn't have NEON. */
  322. #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
  323. return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
  324. #elif (defined(__LINUX__) || defined(__ANDROID__))
  325. return readProcAuxvForNeon(); /* Android offers a static library for this, but it just parses /proc/self/auxv */
  326. #elif (defined(__WINDOWS__) || defined(__WINRT__)) && defined(_M_ARM)
  327. /* All WinRT ARM devices are required to support NEON, but just in case. */
  328. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  329. #else
  330. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  331. return 0;
  332. #endif
  333. }
  334. static int
  335. CPU_have3DNow(void)
  336. {
  337. if (CPU_CPUIDMaxFunction > 0) { /* that is, do we have CPUID at all? */
  338. int a, b, c, d;
  339. cpuid(0x80000000, a, b, c, d);
  340. if (a >= 0x80000001) {
  341. cpuid(0x80000001, a, b, c, d);
  342. return (d & 0x80000000);
  343. }
  344. }
  345. return 0;
  346. }
  347. #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
  348. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  349. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  350. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  351. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  352. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  353. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  354. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  355. static int
  356. CPU_haveAVX2(void)
  357. {
  358. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  359. int a, b, c, d;
  360. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  361. cpuid(7, a, b, c, d);
  362. return (b & 0x00000020);
  363. }
  364. return 0;
  365. }
  366. static int SDL_CPUCount = 0;
  367. int
  368. SDL_GetCPUCount(void)
  369. {
  370. if (!SDL_CPUCount) {
  371. #ifndef SDL_CPUINFO_DISABLED
  372. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  373. if (SDL_CPUCount <= 0) {
  374. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  375. }
  376. #endif
  377. #ifdef HAVE_SYSCTLBYNAME
  378. if (SDL_CPUCount <= 0) {
  379. size_t size = sizeof(SDL_CPUCount);
  380. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  381. }
  382. #endif
  383. #ifdef __WIN32__
  384. if (SDL_CPUCount <= 0) {
  385. SYSTEM_INFO info;
  386. GetSystemInfo(&info);
  387. SDL_CPUCount = info.dwNumberOfProcessors;
  388. }
  389. #endif
  390. #endif
  391. /* There has to be at least 1, right? :) */
  392. if (SDL_CPUCount <= 0) {
  393. SDL_CPUCount = 1;
  394. }
  395. }
  396. return SDL_CPUCount;
  397. }
  398. /* Oh, such a sweet sweet trick, just not very useful. :) */
  399. static const char *
  400. SDL_GetCPUType(void)
  401. {
  402. static char SDL_CPUType[13];
  403. if (!SDL_CPUType[0]) {
  404. int i = 0;
  405. CPU_calcCPUIDFeatures();
  406. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  407. int a, b, c, d;
  408. cpuid(0x00000000, a, b, c, d);
  409. (void) a;
  410. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  411. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  412. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  413. SDL_CPUType[i++] = (char)(b & 0xff);
  414. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  415. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  416. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  417. SDL_CPUType[i++] = (char)(d & 0xff);
  418. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  419. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  420. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  421. SDL_CPUType[i++] = (char)(c & 0xff);
  422. }
  423. if (!SDL_CPUType[0]) {
  424. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  425. }
  426. }
  427. return SDL_CPUType;
  428. }
  429. #ifdef TEST_MAIN /* !!! FIXME: only used for test at the moment. */
  430. static const char *
  431. SDL_GetCPUName(void)
  432. {
  433. static char SDL_CPUName[48];
  434. if (!SDL_CPUName[0]) {
  435. int i = 0;
  436. int a, b, c, d;
  437. CPU_calcCPUIDFeatures();
  438. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  439. cpuid(0x80000000, a, b, c, d);
  440. if (a >= 0x80000004) {
  441. cpuid(0x80000002, a, b, c, d);
  442. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  443. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  444. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  445. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  446. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  447. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  448. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  449. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  450. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  451. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  452. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  453. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  454. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  455. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  456. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  457. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  458. cpuid(0x80000003, a, b, c, d);
  459. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  460. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  461. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  462. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  463. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  464. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  465. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  466. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  467. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  468. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  469. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  470. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  471. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  472. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  473. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  474. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  475. cpuid(0x80000004, a, b, c, d);
  476. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  477. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  478. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  479. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  480. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  481. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  482. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  483. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  484. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  485. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  486. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  487. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  488. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  489. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  490. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  491. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  492. }
  493. }
  494. if (!SDL_CPUName[0]) {
  495. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  496. }
  497. }
  498. return SDL_CPUName;
  499. }
  500. #endif
  501. int
  502. SDL_GetCPUCacheLineSize(void)
  503. {
  504. const char *cpuType = SDL_GetCPUType();
  505. int a, b, c, d;
  506. (void) a; (void) b; (void) c; (void) d;
  507. if (SDL_strcmp(cpuType, "GenuineIntel") == 0) {
  508. cpuid(0x00000001, a, b, c, d);
  509. return (((b >> 8) & 0xff) * 8);
  510. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0) {
  511. cpuid(0x80000005, a, b, c, d);
  512. return (c & 0xff);
  513. } else {
  514. /* Just make a guess here... */
  515. return SDL_CACHELINE_SIZE;
  516. }
  517. }
  518. static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
  519. static Uint32
  520. SDL_GetCPUFeatures(void)
  521. {
  522. if (SDL_CPUFeatures == 0xFFFFFFFF) {
  523. CPU_calcCPUIDFeatures();
  524. SDL_CPUFeatures = 0;
  525. if (CPU_haveRDTSC()) {
  526. SDL_CPUFeatures |= CPU_HAS_RDTSC;
  527. }
  528. if (CPU_haveAltiVec()) {
  529. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  530. }
  531. if (CPU_haveMMX()) {
  532. SDL_CPUFeatures |= CPU_HAS_MMX;
  533. }
  534. if (CPU_have3DNow()) {
  535. SDL_CPUFeatures |= CPU_HAS_3DNOW;
  536. }
  537. if (CPU_haveSSE()) {
  538. SDL_CPUFeatures |= CPU_HAS_SSE;
  539. }
  540. if (CPU_haveSSE2()) {
  541. SDL_CPUFeatures |= CPU_HAS_SSE2;
  542. }
  543. if (CPU_haveSSE3()) {
  544. SDL_CPUFeatures |= CPU_HAS_SSE3;
  545. }
  546. if (CPU_haveSSE41()) {
  547. SDL_CPUFeatures |= CPU_HAS_SSE41;
  548. }
  549. if (CPU_haveSSE42()) {
  550. SDL_CPUFeatures |= CPU_HAS_SSE42;
  551. }
  552. if (CPU_haveAVX()) {
  553. SDL_CPUFeatures |= CPU_HAS_AVX;
  554. }
  555. if (CPU_haveAVX2()) {
  556. SDL_CPUFeatures |= CPU_HAS_AVX2;
  557. }
  558. if (CPU_haveNEON()) {
  559. SDL_CPUFeatures |= CPU_HAS_NEON;
  560. }
  561. }
  562. return SDL_CPUFeatures;
  563. }
  564. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
  565. SDL_bool SDL_HasRDTSC(void)
  566. {
  567. return CPU_FEATURE_AVAILABLE(CPU_HAS_RDTSC);
  568. }
  569. SDL_bool
  570. SDL_HasAltiVec(void)
  571. {
  572. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  573. }
  574. SDL_bool
  575. SDL_HasMMX(void)
  576. {
  577. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  578. }
  579. SDL_bool
  580. SDL_Has3DNow(void)
  581. {
  582. return CPU_FEATURE_AVAILABLE(CPU_HAS_3DNOW);
  583. }
  584. SDL_bool
  585. SDL_HasSSE(void)
  586. {
  587. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  588. }
  589. SDL_bool
  590. SDL_HasSSE2(void)
  591. {
  592. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  593. }
  594. SDL_bool
  595. SDL_HasSSE3(void)
  596. {
  597. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  598. }
  599. SDL_bool
  600. SDL_HasSSE41(void)
  601. {
  602. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  603. }
  604. SDL_bool
  605. SDL_HasSSE42(void)
  606. {
  607. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  608. }
  609. SDL_bool
  610. SDL_HasAVX(void)
  611. {
  612. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  613. }
  614. SDL_bool
  615. SDL_HasAVX2(void)
  616. {
  617. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  618. }
  619. SDL_bool
  620. SDL_HasNEON(void)
  621. {
  622. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  623. }
  624. static int SDL_SystemRAM = 0;
  625. int
  626. SDL_GetSystemRAM(void)
  627. {
  628. if (!SDL_SystemRAM) {
  629. #ifndef SDL_CPUINFO_DISABLED
  630. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  631. if (SDL_SystemRAM <= 0) {
  632. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024*1024));
  633. }
  634. #endif
  635. #ifdef HAVE_SYSCTLBYNAME
  636. if (SDL_SystemRAM <= 0) {
  637. #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__)
  638. #ifdef HW_REALMEM
  639. int mib[2] = {CTL_HW, HW_REALMEM};
  640. #else
  641. /* might only report up to 2 GiB */
  642. int mib[2] = {CTL_HW, HW_PHYSMEM};
  643. #endif /* HW_REALMEM */
  644. #else
  645. int mib[2] = {CTL_HW, HW_MEMSIZE};
  646. #endif /* __FreeBSD__ || __FreeBSD_kernel__ */
  647. Uint64 memsize = 0;
  648. size_t len = sizeof(memsize);
  649. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  650. SDL_SystemRAM = (int)(memsize / (1024*1024));
  651. }
  652. }
  653. #endif
  654. #ifdef __WIN32__
  655. if (SDL_SystemRAM <= 0) {
  656. MEMORYSTATUSEX stat;
  657. stat.dwLength = sizeof(stat);
  658. if (GlobalMemoryStatusEx(&stat)) {
  659. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  660. }
  661. }
  662. #endif
  663. #endif
  664. }
  665. return SDL_SystemRAM;
  666. }
  667. #ifdef TEST_MAIN
  668. #include <stdio.h>
  669. int
  670. main()
  671. {
  672. printf("CPU count: %d\n", SDL_GetCPUCount());
  673. printf("CPU type: %s\n", SDL_GetCPUType());
  674. printf("CPU name: %s\n", SDL_GetCPUName());
  675. printf("CacheLine size: %d\n", SDL_GetCPUCacheLineSize());
  676. printf("RDTSC: %d\n", SDL_HasRDTSC());
  677. printf("Altivec: %d\n", SDL_HasAltiVec());
  678. printf("MMX: %d\n", SDL_HasMMX());
  679. printf("3DNow: %d\n", SDL_Has3DNow());
  680. printf("SSE: %d\n", SDL_HasSSE());
  681. printf("SSE2: %d\n", SDL_HasSSE2());
  682. printf("SSE3: %d\n", SDL_HasSSE3());
  683. printf("SSE4.1: %d\n", SDL_HasSSE41());
  684. printf("SSE4.2: %d\n", SDL_HasSSE42());
  685. printf("AVX: %d\n", SDL_HasAVX());
  686. printf("AVX2: %d\n", SDL_HasAVX2());
  687. printf("NEON: %d\n", SDL_HasNEON());
  688. printf("RAM: %d MB\n", SDL_GetSystemRAM());
  689. return 0;
  690. }
  691. #endif /* TEST_MAIN */
  692. /* vi: set ts=4 sw=4 expandtab: */