SDL_cpuinfo.c 32 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2020 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #ifdef TEST_MAIN
  19. #include "SDL_config.h"
  20. #else
  21. #include "../SDL_internal.h"
  22. #endif
  23. #if defined(__WIN32__) || defined(__WINRT__)
  24. #include "../core/windows/SDL_windows.h"
  25. #endif
  26. #if defined(__OS2__)
  27. #define INCL_DOS
  28. #include <os2.h>
  29. #ifndef QSV_NUMPROCESSORS
  30. #define QSV_NUMPROCESSORS 26
  31. #endif
  32. #endif
  33. /* CPU feature detection for SDL */
  34. #include "SDL_cpuinfo.h"
  35. #include "SDL_assert.h"
  36. #ifdef HAVE_SYSCONF
  37. #include <unistd.h>
  38. #endif
  39. #ifdef HAVE_SYSCTLBYNAME
  40. #include <sys/types.h>
  41. #include <sys/sysctl.h>
  42. #endif
  43. #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
  44. #include <sys/sysctl.h> /* For AltiVec check */
  45. #elif defined(__OpenBSD__) && defined(__powerpc__)
  46. #include <sys/param.h>
  47. #include <sys/sysctl.h> /* For AltiVec check */
  48. #include <machine/cpu.h>
  49. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  50. #include <signal.h>
  51. #include <setjmp.h>
  52. #endif
  53. #if defined(__QNXNTO__)
  54. #include <sys/syspage.h>
  55. #endif
  56. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH)
  57. /*#include <asm/hwcap.h>*/
  58. #ifndef AT_HWCAP
  59. #define AT_HWCAP 16
  60. #endif
  61. #ifndef AT_PLATFORM
  62. #define AT_PLATFORM 15
  63. #endif
  64. /* Prevent compilation error when including elf.h would also try to define AT_* as an enum */
  65. #ifndef AT_NULL
  66. #define AT_NULL 0
  67. #endif
  68. #ifndef HWCAP_NEON
  69. #define HWCAP_NEON (1 << 12)
  70. #endif
  71. #if defined HAVE_GETAUXVAL
  72. #include <sys/auxv.h>
  73. #else
  74. #include <fcntl.h>
  75. #endif
  76. #endif
  77. #if defined(__ANDROID__) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
  78. #if __ARM_ARCH < 8
  79. #include <cpu-features.h>
  80. #endif
  81. #endif
  82. #ifdef __RISCOS__
  83. #include <kernel.h>
  84. #include <swis.h>
  85. #endif
  86. #define CPU_HAS_RDTSC (1 << 0)
  87. #define CPU_HAS_ALTIVEC (1 << 1)
  88. #define CPU_HAS_MMX (1 << 2)
  89. #define CPU_HAS_3DNOW (1 << 3)
  90. #define CPU_HAS_SSE (1 << 4)
  91. #define CPU_HAS_SSE2 (1 << 5)
  92. #define CPU_HAS_SSE3 (1 << 6)
  93. #define CPU_HAS_SSE41 (1 << 7)
  94. #define CPU_HAS_SSE42 (1 << 8)
  95. #define CPU_HAS_AVX (1 << 9)
  96. #define CPU_HAS_AVX2 (1 << 10)
  97. #define CPU_HAS_NEON (1 << 11)
  98. #define CPU_HAS_AVX512F (1 << 12)
  99. #define CPU_HAS_ARM_SIMD (1 << 13)
  100. #if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__
  101. /* This is the brute force way of detecting instruction sets...
  102. the idea is borrowed from the libmpeg2 library - thanks!
  103. */
  104. static jmp_buf jmpbuf;
  105. static void
  106. illegal_instruction(int sig)
  107. {
  108. longjmp(jmpbuf, 1);
  109. }
  110. #endif /* HAVE_SETJMP */
  111. static int
  112. CPU_haveCPUID(void)
  113. {
  114. int has_CPUID = 0;
  115. /* *INDENT-OFF* */
  116. #ifndef SDL_CPUINFO_DISABLED
  117. #if defined(__GNUC__) && defined(i386)
  118. __asm__ (
  119. " pushfl # Get original EFLAGS \n"
  120. " popl %%eax \n"
  121. " movl %%eax,%%ecx \n"
  122. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  123. " pushl %%eax # Save new EFLAGS value on stack \n"
  124. " popfl # Replace current EFLAGS value \n"
  125. " pushfl # Get new EFLAGS \n"
  126. " popl %%eax # Store new EFLAGS in EAX \n"
  127. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  128. " jz 1f # Processor=80486 \n"
  129. " movl $1,%0 # We have CPUID support \n"
  130. "1: \n"
  131. : "=m" (has_CPUID)
  132. :
  133. : "%eax", "%ecx"
  134. );
  135. #elif defined(__GNUC__) && defined(__x86_64__)
  136. /* Technically, if this is being compiled under __x86_64__ then it has
  137. CPUid by definition. But it's nice to be able to prove it. :) */
  138. __asm__ (
  139. " pushfq # Get original EFLAGS \n"
  140. " popq %%rax \n"
  141. " movq %%rax,%%rcx \n"
  142. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  143. " pushq %%rax # Save new EFLAGS value on stack \n"
  144. " popfq # Replace current EFLAGS value \n"
  145. " pushfq # Get new EFLAGS \n"
  146. " popq %%rax # Store new EFLAGS in EAX \n"
  147. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  148. " jz 1f # Processor=80486 \n"
  149. " movl $1,%0 # We have CPUID support \n"
  150. "1: \n"
  151. : "=m" (has_CPUID)
  152. :
  153. : "%rax", "%rcx"
  154. );
  155. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  156. __asm {
  157. pushfd ; Get original EFLAGS
  158. pop eax
  159. mov ecx, eax
  160. xor eax, 200000h ; Flip ID bit in EFLAGS
  161. push eax ; Save new EFLAGS value on stack
  162. popfd ; Replace current EFLAGS value
  163. pushfd ; Get new EFLAGS
  164. pop eax ; Store new EFLAGS in EAX
  165. xor eax, ecx ; Can not toggle ID bit,
  166. jz done ; Processor=80486
  167. mov has_CPUID,1 ; We have CPUID support
  168. done:
  169. }
  170. #elif defined(_MSC_VER) && defined(_M_X64)
  171. has_CPUID = 1;
  172. #elif defined(__sun) && defined(__i386)
  173. __asm (
  174. " pushfl \n"
  175. " popl %eax \n"
  176. " movl %eax,%ecx \n"
  177. " xorl $0x200000,%eax \n"
  178. " pushl %eax \n"
  179. " popfl \n"
  180. " pushfl \n"
  181. " popl %eax \n"
  182. " xorl %ecx,%eax \n"
  183. " jz 1f \n"
  184. " movl $1,-8(%ebp) \n"
  185. "1: \n"
  186. );
  187. #elif defined(__sun) && defined(__amd64)
  188. __asm (
  189. " pushfq \n"
  190. " popq %rax \n"
  191. " movq %rax,%rcx \n"
  192. " xorl $0x200000,%eax \n"
  193. " pushq %rax \n"
  194. " popfq \n"
  195. " pushfq \n"
  196. " popq %rax \n"
  197. " xorl %ecx,%eax \n"
  198. " jz 1f \n"
  199. " movl $1,-8(%rbp) \n"
  200. "1: \n"
  201. );
  202. #endif
  203. #endif
  204. /* *INDENT-ON* */
  205. return has_CPUID;
  206. }
  207. #if defined(__GNUC__) && defined(i386)
  208. #define cpuid(func, a, b, c, d) \
  209. __asm__ __volatile__ ( \
  210. " pushl %%ebx \n" \
  211. " xorl %%ecx,%%ecx \n" \
  212. " cpuid \n" \
  213. " movl %%ebx, %%esi \n" \
  214. " popl %%ebx \n" : \
  215. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  216. #elif defined(__GNUC__) && defined(__x86_64__)
  217. #define cpuid(func, a, b, c, d) \
  218. __asm__ __volatile__ ( \
  219. " pushq %%rbx \n" \
  220. " xorq %%rcx,%%rcx \n" \
  221. " cpuid \n" \
  222. " movq %%rbx, %%rsi \n" \
  223. " popq %%rbx \n" : \
  224. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  225. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  226. #define cpuid(func, a, b, c, d) \
  227. __asm { \
  228. __asm mov eax, func \
  229. __asm xor ecx, ecx \
  230. __asm cpuid \
  231. __asm mov a, eax \
  232. __asm mov b, ebx \
  233. __asm mov c, ecx \
  234. __asm mov d, edx \
  235. }
  236. #elif defined(_MSC_VER) && defined(_M_X64)
  237. #define cpuid(func, a, b, c, d) \
  238. { \
  239. int CPUInfo[4]; \
  240. __cpuid(CPUInfo, func); \
  241. a = CPUInfo[0]; \
  242. b = CPUInfo[1]; \
  243. c = CPUInfo[2]; \
  244. d = CPUInfo[3]; \
  245. }
  246. #else
  247. #define cpuid(func, a, b, c, d) \
  248. do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
  249. #endif
  250. static int CPU_CPUIDFeatures[4];
  251. static int CPU_CPUIDMaxFunction = 0;
  252. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  253. static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
  254. static void
  255. CPU_calcCPUIDFeatures(void)
  256. {
  257. static SDL_bool checked = SDL_FALSE;
  258. if (!checked) {
  259. checked = SDL_TRUE;
  260. if (CPU_haveCPUID()) {
  261. int a, b, c, d;
  262. cpuid(0, a, b, c, d);
  263. CPU_CPUIDMaxFunction = a;
  264. if (CPU_CPUIDMaxFunction >= 1) {
  265. cpuid(1, a, b, c, d);
  266. CPU_CPUIDFeatures[0] = a;
  267. CPU_CPUIDFeatures[1] = b;
  268. CPU_CPUIDFeatures[2] = c;
  269. CPU_CPUIDFeatures[3] = d;
  270. /* Check to make sure we can call xgetbv */
  271. if (c & 0x08000000) {
  272. /* Call xgetbv to see if YMM (etc) register state is saved */
  273. #if defined(__GNUC__) && (defined(i386) || defined(__x86_64__))
  274. __asm__(".byte 0x0f, 0x01, 0xd0" : "=a" (a) : "c" (0) : "%edx");
  275. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  276. a = (int)_xgetbv(0);
  277. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  278. __asm
  279. {
  280. xor ecx, ecx
  281. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  282. mov a, eax
  283. }
  284. #endif
  285. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  286. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
  287. }
  288. }
  289. }
  290. }
  291. }
  292. static int
  293. CPU_haveAltiVec(void)
  294. {
  295. volatile int altivec = 0;
  296. #ifndef SDL_CPUINFO_DISABLED
  297. #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))
  298. #ifdef __OpenBSD__
  299. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  300. #else
  301. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  302. #endif
  303. int hasVectorUnit = 0;
  304. size_t length = sizeof(hasVectorUnit);
  305. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  306. if (0 == error)
  307. altivec = (hasVectorUnit != 0);
  308. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  309. void (*handler) (int sig);
  310. handler = signal(SIGILL, illegal_instruction);
  311. if (setjmp(jmpbuf) == 0) {
  312. asm volatile ("mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::"r" (-1));
  313. altivec = 1;
  314. }
  315. signal(SIGILL, handler);
  316. #endif
  317. #endif
  318. return altivec;
  319. }
  320. #if defined(__ARM_ARCH) && (__ARM_ARCH >= 6)
  321. static int
  322. CPU_haveARMSIMD(void)
  323. {
  324. return 1;
  325. }
  326. #elif !defined(__arm__)
  327. static int
  328. CPU_haveARMSIMD(void)
  329. {
  330. return 0;
  331. }
  332. #elif defined(__LINUX__)
  333. #include <unistd.h>
  334. #include <sys/types.h>
  335. #include <sys/stat.h>
  336. #include <fcntl.h>
  337. #include <elf.h>
  338. static int
  339. CPU_haveARMSIMD(void)
  340. {
  341. int arm_simd = 0;
  342. int fd;
  343. fd = open("/proc/self/auxv", O_RDONLY);
  344. if (fd >= 0)
  345. {
  346. Elf32_auxv_t aux;
  347. while (read(fd, &aux, sizeof aux) == sizeof aux)
  348. {
  349. if (aux.a_type == AT_PLATFORM)
  350. {
  351. const char *plat = (const char *) aux.a_un.a_val;
  352. if (plat) {
  353. arm_simd = strncmp(plat, "v6l", 3) == 0 ||
  354. strncmp(plat, "v7l", 3) == 0;
  355. }
  356. }
  357. }
  358. close(fd);
  359. }
  360. return arm_simd;
  361. }
  362. #elif defined(__RISCOS__)
  363. static int
  364. CPU_haveARMSIMD(void)
  365. {
  366. _kernel_swi_regs regs;
  367. regs.r[0] = 0;
  368. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  369. return 0;
  370. if (!(regs.r[0] & (1<<31)))
  371. return 0;
  372. regs.r[0] = 34;
  373. regs.r[1] = 29;
  374. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  375. return 0;
  376. return regs.r[0];
  377. }
  378. #else
  379. static int
  380. CPU_haveARMSIMD(void)
  381. {
  382. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  383. return 0;
  384. }
  385. #endif
  386. #if defined(__LINUX__) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
  387. static int
  388. readProcAuxvForNeon(void)
  389. {
  390. int neon = 0;
  391. int kv[2];
  392. const int fd = open("/proc/self/auxv", O_RDONLY);
  393. if (fd != -1) {
  394. while (read(fd, kv, sizeof (kv)) == sizeof (kv)) {
  395. if (kv[0] == AT_HWCAP) {
  396. neon = ((kv[1] & HWCAP_NEON) == HWCAP_NEON);
  397. break;
  398. }
  399. }
  400. close(fd);
  401. }
  402. return neon;
  403. }
  404. #endif
  405. static int
  406. CPU_haveNEON(void)
  407. {
  408. /* The way you detect NEON is a privileged instruction on ARM, so you have
  409. query the OS kernel in a platform-specific way. :/ */
  410. #if defined(SDL_CPUINFO_DISABLED)
  411. return 0; /* disabled */
  412. #elif (defined(__WINDOWS__) || defined(__WINRT__)) && (defined(_M_ARM) || defined(_M_ARM64))
  413. /* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
  414. /* Seems to have been removed */
  415. # if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
  416. # define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  417. # endif
  418. /* All WinRT ARM devices are required to support NEON, but just in case. */
  419. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  420. #elif defined(__ARM_ARCH) && (__ARM_ARCH >= 8)
  421. return 1; /* ARMv8 always has non-optional NEON support. */
  422. #elif defined(__APPLE__) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  423. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  424. return 1; /* all Apple ARMv7 chips and later have NEON. */
  425. #elif defined(__APPLE__)
  426. return 0; /* assume anything else from Apple doesn't have NEON. */
  427. #elif !defined(__arm__)
  428. return 0; /* not an ARM CPU at all. */
  429. #elif defined(__QNXNTO__)
  430. return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
  431. #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
  432. return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
  433. #elif defined(__LINUX__)
  434. return readProcAuxvForNeon();
  435. #elif defined(__ANDROID__)
  436. /* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
  437. {
  438. AndroidCpuFamily cpu_family = android_getCpuFamily();
  439. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  440. uint64_t cpu_features = android_getCpuFeatures();
  441. if ((cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) != 0) {
  442. return 1;
  443. }
  444. }
  445. return 0;
  446. }
  447. #elif defined(__RISCOS__)
  448. /* Use the VFPSupport_Features SWI to access the MVFR registers */
  449. {
  450. _kernel_swi_regs regs;
  451. regs.r[0] = 0;
  452. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  453. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  454. return 1;
  455. }
  456. }
  457. return 0;
  458. }
  459. #else
  460. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  461. return 0;
  462. #endif
  463. }
  464. static int
  465. CPU_have3DNow(void)
  466. {
  467. if (CPU_CPUIDMaxFunction > 0) { /* that is, do we have CPUID at all? */
  468. int a, b, c, d;
  469. cpuid(0x80000000, a, b, c, d);
  470. if (a >= 0x80000001) {
  471. cpuid(0x80000001, a, b, c, d);
  472. return (d & 0x80000000);
  473. }
  474. }
  475. return 0;
  476. }
  477. #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
  478. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  479. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  480. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  481. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  482. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  483. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  484. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  485. static int
  486. CPU_haveAVX2(void)
  487. {
  488. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  489. int a, b, c, d;
  490. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  491. cpuid(7, a, b, c, d);
  492. return (b & 0x00000020);
  493. }
  494. return 0;
  495. }
  496. static int
  497. CPU_haveAVX512F(void)
  498. {
  499. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  500. int a, b, c, d;
  501. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  502. cpuid(7, a, b, c, d);
  503. return (b & 0x00010000);
  504. }
  505. return 0;
  506. }
  507. static int SDL_CPUCount = 0;
  508. int
  509. SDL_GetCPUCount(void)
  510. {
  511. if (!SDL_CPUCount) {
  512. #ifndef SDL_CPUINFO_DISABLED
  513. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  514. if (SDL_CPUCount <= 0) {
  515. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  516. }
  517. #endif
  518. #ifdef HAVE_SYSCTLBYNAME
  519. if (SDL_CPUCount <= 0) {
  520. size_t size = sizeof(SDL_CPUCount);
  521. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  522. }
  523. #endif
  524. #ifdef __WIN32__
  525. if (SDL_CPUCount <= 0) {
  526. SYSTEM_INFO info;
  527. GetSystemInfo(&info);
  528. SDL_CPUCount = info.dwNumberOfProcessors;
  529. }
  530. #endif
  531. #ifdef __OS2__
  532. if (SDL_CPUCount <= 0) {
  533. DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
  534. &SDL_CPUCount, sizeof(SDL_CPUCount) );
  535. }
  536. #endif
  537. #endif
  538. /* There has to be at least 1, right? :) */
  539. if (SDL_CPUCount <= 0) {
  540. SDL_CPUCount = 1;
  541. }
  542. }
  543. return SDL_CPUCount;
  544. }
  545. /* Oh, such a sweet sweet trick, just not very useful. :) */
  546. static const char *
  547. SDL_GetCPUType(void)
  548. {
  549. static char SDL_CPUType[13];
  550. if (!SDL_CPUType[0]) {
  551. int i = 0;
  552. CPU_calcCPUIDFeatures();
  553. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  554. int a, b, c, d;
  555. cpuid(0x00000000, a, b, c, d);
  556. (void) a;
  557. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  558. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  559. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  560. SDL_CPUType[i++] = (char)(b & 0xff);
  561. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  562. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  563. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  564. SDL_CPUType[i++] = (char)(d & 0xff);
  565. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  566. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  567. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  568. SDL_CPUType[i++] = (char)(c & 0xff);
  569. }
  570. if (!SDL_CPUType[0]) {
  571. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  572. }
  573. }
  574. return SDL_CPUType;
  575. }
  576. #ifdef TEST_MAIN /* !!! FIXME: only used for test at the moment. */
  577. static const char *
  578. SDL_GetCPUName(void)
  579. {
  580. static char SDL_CPUName[48];
  581. if (!SDL_CPUName[0]) {
  582. int i = 0;
  583. int a, b, c, d;
  584. CPU_calcCPUIDFeatures();
  585. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  586. cpuid(0x80000000, a, b, c, d);
  587. if (a >= 0x80000004) {
  588. cpuid(0x80000002, a, b, c, d);
  589. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  590. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  591. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  592. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  593. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  594. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  595. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  596. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  597. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  598. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  599. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  600. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  601. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  602. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  603. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  604. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  605. cpuid(0x80000003, a, b, c, d);
  606. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  607. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  608. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  609. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  610. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  611. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  612. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  613. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  614. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  615. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  616. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  617. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  618. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  619. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  620. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  621. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  622. cpuid(0x80000004, a, b, c, d);
  623. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  624. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  625. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  626. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  627. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  628. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  629. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  630. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  631. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  632. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  633. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  634. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  635. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  636. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  637. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  638. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  639. }
  640. }
  641. if (!SDL_CPUName[0]) {
  642. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  643. }
  644. }
  645. return SDL_CPUName;
  646. }
  647. #endif
  648. int
  649. SDL_GetCPUCacheLineSize(void)
  650. {
  651. const char *cpuType = SDL_GetCPUType();
  652. int a, b, c, d;
  653. (void) a; (void) b; (void) c; (void) d;
  654. if (SDL_strcmp(cpuType, "GenuineIntel") == 0) {
  655. cpuid(0x00000001, a, b, c, d);
  656. return (((b >> 8) & 0xff) * 8);
  657. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  658. cpuid(0x80000005, a, b, c, d);
  659. return (c & 0xff);
  660. } else {
  661. /* Just make a guess here... */
  662. return SDL_CACHELINE_SIZE;
  663. }
  664. }
  665. static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
  666. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  667. static Uint32
  668. SDL_GetCPUFeatures(void)
  669. {
  670. if (SDL_CPUFeatures == 0xFFFFFFFF) {
  671. CPU_calcCPUIDFeatures();
  672. SDL_CPUFeatures = 0;
  673. SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
  674. if (CPU_haveRDTSC()) {
  675. SDL_CPUFeatures |= CPU_HAS_RDTSC;
  676. }
  677. if (CPU_haveAltiVec()) {
  678. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  679. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  680. }
  681. if (CPU_haveMMX()) {
  682. SDL_CPUFeatures |= CPU_HAS_MMX;
  683. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  684. }
  685. if (CPU_have3DNow()) {
  686. SDL_CPUFeatures |= CPU_HAS_3DNOW;
  687. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  688. }
  689. if (CPU_haveSSE()) {
  690. SDL_CPUFeatures |= CPU_HAS_SSE;
  691. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  692. }
  693. if (CPU_haveSSE2()) {
  694. SDL_CPUFeatures |= CPU_HAS_SSE2;
  695. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  696. }
  697. if (CPU_haveSSE3()) {
  698. SDL_CPUFeatures |= CPU_HAS_SSE3;
  699. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  700. }
  701. if (CPU_haveSSE41()) {
  702. SDL_CPUFeatures |= CPU_HAS_SSE41;
  703. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  704. }
  705. if (CPU_haveSSE42()) {
  706. SDL_CPUFeatures |= CPU_HAS_SSE42;
  707. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  708. }
  709. if (CPU_haveAVX()) {
  710. SDL_CPUFeatures |= CPU_HAS_AVX;
  711. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  712. }
  713. if (CPU_haveAVX2()) {
  714. SDL_CPUFeatures |= CPU_HAS_AVX2;
  715. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  716. }
  717. if (CPU_haveAVX512F()) {
  718. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  719. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  720. }
  721. if (CPU_haveARMSIMD()) {
  722. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  723. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  724. }
  725. if (CPU_haveNEON()) {
  726. SDL_CPUFeatures |= CPU_HAS_NEON;
  727. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  728. }
  729. }
  730. return SDL_CPUFeatures;
  731. }
  732. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
  733. SDL_bool SDL_HasRDTSC(void)
  734. {
  735. return CPU_FEATURE_AVAILABLE(CPU_HAS_RDTSC);
  736. }
  737. SDL_bool
  738. SDL_HasAltiVec(void)
  739. {
  740. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  741. }
  742. SDL_bool
  743. SDL_HasMMX(void)
  744. {
  745. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  746. }
  747. SDL_bool
  748. SDL_Has3DNow(void)
  749. {
  750. return CPU_FEATURE_AVAILABLE(CPU_HAS_3DNOW);
  751. }
  752. SDL_bool
  753. SDL_HasSSE(void)
  754. {
  755. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  756. }
  757. SDL_bool
  758. SDL_HasSSE2(void)
  759. {
  760. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  761. }
  762. SDL_bool
  763. SDL_HasSSE3(void)
  764. {
  765. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  766. }
  767. SDL_bool
  768. SDL_HasSSE41(void)
  769. {
  770. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  771. }
  772. SDL_bool
  773. SDL_HasSSE42(void)
  774. {
  775. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  776. }
  777. SDL_bool
  778. SDL_HasAVX(void)
  779. {
  780. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  781. }
  782. SDL_bool
  783. SDL_HasAVX2(void)
  784. {
  785. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  786. }
  787. SDL_bool
  788. SDL_HasAVX512F(void)
  789. {
  790. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  791. }
  792. SDL_bool
  793. SDL_HasARMSIMD(void)
  794. {
  795. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  796. }
  797. SDL_bool
  798. SDL_HasNEON(void)
  799. {
  800. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  801. }
  802. static int SDL_SystemRAM = 0;
  803. int
  804. SDL_GetSystemRAM(void)
  805. {
  806. if (!SDL_SystemRAM) {
  807. #ifndef SDL_CPUINFO_DISABLED
  808. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  809. if (SDL_SystemRAM <= 0) {
  810. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024*1024));
  811. }
  812. #endif
  813. #ifdef HAVE_SYSCTLBYNAME
  814. if (SDL_SystemRAM <= 0) {
  815. #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__)
  816. #ifdef HW_REALMEM
  817. int mib[2] = {CTL_HW, HW_REALMEM};
  818. #else
  819. /* might only report up to 2 GiB */
  820. int mib[2] = {CTL_HW, HW_PHYSMEM};
  821. #endif /* HW_REALMEM */
  822. #else
  823. int mib[2] = {CTL_HW, HW_MEMSIZE};
  824. #endif /* __FreeBSD__ || __FreeBSD_kernel__ */
  825. Uint64 memsize = 0;
  826. size_t len = sizeof(memsize);
  827. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  828. SDL_SystemRAM = (int)(memsize / (1024*1024));
  829. }
  830. }
  831. #endif
  832. #ifdef __WIN32__
  833. if (SDL_SystemRAM <= 0) {
  834. MEMORYSTATUSEX stat;
  835. stat.dwLength = sizeof(stat);
  836. if (GlobalMemoryStatusEx(&stat)) {
  837. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  838. }
  839. }
  840. #endif
  841. #ifdef __OS2__
  842. if (SDL_SystemRAM <= 0) {
  843. Uint32 sysram = 0;
  844. DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
  845. SDL_SystemRAM = (int) (sysram / 0x100000U);
  846. }
  847. #endif
  848. #ifdef __RISCOS__
  849. if (SDL_SystemRAM <= 0) {
  850. _kernel_swi_regs regs;
  851. regs.r[0] = 0x108;
  852. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  853. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  854. }
  855. }
  856. #endif
  857. #endif
  858. }
  859. return SDL_SystemRAM;
  860. }
  861. size_t
  862. SDL_SIMDGetAlignment(void)
  863. {
  864. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  865. SDL_GetCPUFeatures(); /* make sure this has been calculated */
  866. }
  867. SDL_assert(SDL_SIMDAlignment != 0);
  868. return SDL_SIMDAlignment;
  869. }
  870. void *
  871. SDL_SIMDAlloc(const size_t len)
  872. {
  873. const size_t alignment = SDL_SIMDGetAlignment();
  874. const size_t padding = alignment - (len % alignment);
  875. const size_t padded = (padding != alignment) ? (len + padding) : len;
  876. Uint8 *retval = NULL;
  877. Uint8 *ptr = (Uint8 *) SDL_malloc(padded + alignment + sizeof (void *));
  878. if (ptr) {
  879. /* store the actual malloc pointer right before our aligned pointer. */
  880. retval = ptr + sizeof (void *);
  881. retval += alignment - (((size_t) retval) % alignment);
  882. *(((void **) retval) - 1) = ptr;
  883. }
  884. return retval;
  885. }
  886. void *
  887. SDL_SIMDRealloc(void *mem, const size_t len)
  888. {
  889. const size_t alignment = SDL_SIMDGetAlignment();
  890. const size_t padding = alignment - (len % alignment);
  891. const size_t padded = (padding != alignment) ? (len + padding) : len;
  892. Uint8 *retval = (Uint8*) mem;
  893. void *oldmem = mem;
  894. size_t memdiff, ptrdiff;
  895. Uint8 *ptr;
  896. if (mem) {
  897. void **realptr = (void **) mem;
  898. realptr--;
  899. mem = *(((void **) mem) - 1);
  900. /* Check the delta between the real pointer and user pointer */
  901. memdiff = ((size_t) oldmem) - ((size_t) mem);
  902. }
  903. ptr = (Uint8 *) SDL_realloc(mem, padded + alignment + sizeof (void *));
  904. if (ptr == mem) {
  905. return retval; /* Pointer didn't change, nothing to do */
  906. }
  907. if (ptr == NULL) {
  908. return NULL; /* Out of memory, bail! */
  909. }
  910. /* Store the actual malloc pointer right before our aligned pointer. */
  911. retval = ptr + sizeof (void *);
  912. retval += alignment - (((size_t) retval) % alignment);
  913. /* Make sure the delta is the same! */
  914. if (mem) {
  915. ptrdiff = ((size_t) retval) - ((size_t) ptr);
  916. if (memdiff != ptrdiff) { /* Delta has changed, copy to new offset! */
  917. oldmem = (void*) (((size_t) ptr) + memdiff);
  918. /* Even though the data past the old `len` is undefined, this is the
  919. * only length value we have, and it guarantees that we copy all the
  920. * previous memory anyhow.
  921. */
  922. SDL_memmove(retval, oldmem, len);
  923. }
  924. }
  925. /* Actually store the malloc pointer, finally. */
  926. *(((void **) retval) - 1) = ptr;
  927. return retval;
  928. }
  929. void
  930. SDL_SIMDFree(void *ptr)
  931. {
  932. if (ptr) {
  933. void **realptr = (void **) ptr;
  934. realptr--;
  935. SDL_free(*(((void **) ptr) - 1));
  936. }
  937. }
  938. #ifdef TEST_MAIN
  939. #include <stdio.h>
  940. int
  941. main()
  942. {
  943. printf("CPU count: %d\n", SDL_GetCPUCount());
  944. printf("CPU type: %s\n", SDL_GetCPUType());
  945. printf("CPU name: %s\n", SDL_GetCPUName());
  946. printf("CacheLine size: %d\n", SDL_GetCPUCacheLineSize());
  947. printf("RDTSC: %d\n", SDL_HasRDTSC());
  948. printf("Altivec: %d\n", SDL_HasAltiVec());
  949. printf("MMX: %d\n", SDL_HasMMX());
  950. printf("3DNow: %d\n", SDL_Has3DNow());
  951. printf("SSE: %d\n", SDL_HasSSE());
  952. printf("SSE2: %d\n", SDL_HasSSE2());
  953. printf("SSE3: %d\n", SDL_HasSSE3());
  954. printf("SSE4.1: %d\n", SDL_HasSSE41());
  955. printf("SSE4.2: %d\n", SDL_HasSSE42());
  956. printf("AVX: %d\n", SDL_HasAVX());
  957. printf("AVX2: %d\n", SDL_HasAVX2());
  958. printf("AVX-512F: %d\n", SDL_HasAVX512F());
  959. printf("ARM SIMD: %d\n", SDL_HasARMSIMD());
  960. printf("NEON: %d\n", SDL_HasNEON());
  961. printf("RAM: %d MB\n", SDL_GetSystemRAM());
  962. return 0;
  963. }
  964. #endif /* TEST_MAIN */
  965. /* vi: set ts=4 sw=4 expandtab: */