SDL_cpuinfo.c 39 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2025 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #ifdef TEST_MAIN
  19. #include "SDL_config.h"
  20. #else
  21. #include "../SDL_internal.h"
  22. #endif
  23. #if defined(__WIN32__) || defined(__WINRT__) || defined(__GDK__)
  24. #include "../core/windows/SDL_windows.h"
  25. #endif
  26. #if defined(__OS2__)
  27. #undef HAVE_SYSCTLBYNAME
  28. #define INCL_DOS
  29. #include <os2.h>
  30. #ifndef QSV_NUMPROCESSORS
  31. #define QSV_NUMPROCESSORS 26
  32. #endif
  33. #endif
  34. /* CPU feature detection for SDL */
  35. #include "SDL_cpuinfo.h"
  36. #include "SDL_assert.h"
  37. #ifdef HAVE_SYSCONF
  38. #include <unistd.h>
  39. #endif
  40. #ifdef HAVE_SYSCTLBYNAME
  41. #include <sys/types.h>
  42. #include <sys/sysctl.h>
  43. #endif
  44. #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
  45. #include <sys/sysctl.h> /* For AltiVec check */
  46. #elif defined(__OpenBSD__) && defined(__powerpc__)
  47. #include <sys/types.h>
  48. #include <sys/sysctl.h> /* For AltiVec check */
  49. #include <machine/cpu.h>
  50. #elif defined(__FreeBSD__) && defined(__powerpc__)
  51. #include <machine/cpu.h>
  52. #include <sys/auxv.h>
  53. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  54. #include <signal.h>
  55. #include <setjmp.h>
  56. #endif
  57. #if defined(__QNXNTO__)
  58. #include <sys/syspage.h>
  59. #endif
  60. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__arm__)
  61. #include <unistd.h>
  62. #include <sys/types.h>
  63. #include <sys/stat.h>
  64. #include <fcntl.h>
  65. #include <elf.h>
  66. /*#include <asm/hwcap.h>*/
  67. #ifndef AT_HWCAP
  68. #define AT_HWCAP 16
  69. #endif
  70. #ifndef AT_PLATFORM
  71. #define AT_PLATFORM 15
  72. #endif
  73. #ifndef HWCAP_NEON
  74. #define HWCAP_NEON (1 << 12)
  75. #endif
  76. #endif
  77. #if defined (__FreeBSD__)
  78. #include <sys/param.h>
  79. #endif
  80. #if defined(__ANDROID__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  81. #include <cpu-features.h>
  82. #endif
  83. #if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
  84. #include <sys/auxv.h>
  85. #endif
  86. #ifdef __RISCOS__
  87. #include <kernel.h>
  88. #include <swis.h>
  89. #endif
  90. #ifdef __PS2__
  91. #include <kernel.h>
  92. #endif
  93. #define CPU_HAS_RDTSC (1 << 0)
  94. #define CPU_HAS_ALTIVEC (1 << 1)
  95. #define CPU_HAS_MMX (1 << 2)
  96. #define CPU_HAS_3DNOW (1 << 3)
  97. #define CPU_HAS_SSE (1 << 4)
  98. #define CPU_HAS_SSE2 (1 << 5)
  99. #define CPU_HAS_SSE3 (1 << 6)
  100. #define CPU_HAS_SSE41 (1 << 7)
  101. #define CPU_HAS_SSE42 (1 << 8)
  102. #define CPU_HAS_AVX (1 << 9)
  103. #define CPU_HAS_AVX2 (1 << 10)
  104. #define CPU_HAS_NEON (1 << 11)
  105. #define CPU_HAS_AVX512F (1 << 12)
  106. #define CPU_HAS_ARM_SIMD (1 << 13)
  107. #define CPU_HAS_LSX (1 << 14)
  108. #define CPU_HAS_LASX (1 << 15)
  109. #define CPU_CFG2 0x2
  110. #define CPU_CFG2_LSX (1 << 6)
  111. #define CPU_CFG2_LASX (1 << 7)
  112. #if !defined(SDL_CPUINFO_DISABLED) && \
  113. !((defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))) && \
  114. !(defined(__FreeBSD__) && defined(__powerpc__)) && \
  115. !(defined(__LINUX__) && defined(__powerpc__) && defined(HAVE_GETAUXVAL)) && \
  116. defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  117. /* This is the brute force way of detecting instruction sets...
  118. the idea is borrowed from the libmpeg2 library - thanks!
  119. */
  120. static jmp_buf jmpbuf;
  121. static void illegal_instruction(int sig)
  122. {
  123. longjmp(jmpbuf, 1);
  124. }
  125. #endif /* HAVE_SETJMP */
  126. static int CPU_haveCPUID(void)
  127. {
  128. int has_CPUID = 0;
  129. /* *INDENT-OFF* */ /* clang-format off */
  130. #ifndef SDL_CPUINFO_DISABLED
  131. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  132. __asm__ (
  133. " pushfl # Get original EFLAGS \n"
  134. " popl %%eax \n"
  135. " movl %%eax,%%ecx \n"
  136. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  137. " pushl %%eax # Save new EFLAGS value on stack \n"
  138. " popfl # Replace current EFLAGS value \n"
  139. " pushfl # Get new EFLAGS \n"
  140. " popl %%eax # Store new EFLAGS in EAX \n"
  141. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  142. " jz 1f # Processor=80486 \n"
  143. " movl $1,%0 # We have CPUID support \n"
  144. "1: \n"
  145. : "=m" (has_CPUID)
  146. :
  147. : "%eax", "%ecx"
  148. );
  149. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  150. /* Technically, if this is being compiled under __x86_64__ then it has
  151. CPUid by definition. But it's nice to be able to prove it. :) */
  152. __asm__ (
  153. " pushfq # Get original EFLAGS \n"
  154. " popq %%rax \n"
  155. " movq %%rax,%%rcx \n"
  156. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  157. " pushq %%rax # Save new EFLAGS value on stack \n"
  158. " popfq # Replace current EFLAGS value \n"
  159. " pushfq # Get new EFLAGS \n"
  160. " popq %%rax # Store new EFLAGS in EAX \n"
  161. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  162. " jz 1f # Processor=80486 \n"
  163. " movl $1,%0 # We have CPUID support \n"
  164. "1: \n"
  165. : "=m" (has_CPUID)
  166. :
  167. : "%rax", "%rcx"
  168. );
  169. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  170. __asm {
  171. pushfd ; Get original EFLAGS
  172. pop eax
  173. mov ecx, eax
  174. xor eax, 200000h ; Flip ID bit in EFLAGS
  175. push eax ; Save new EFLAGS value on stack
  176. popfd ; Replace current EFLAGS value
  177. pushfd ; Get new EFLAGS
  178. pop eax ; Store new EFLAGS in EAX
  179. xor eax, ecx ; Can not toggle ID bit,
  180. jz done ; Processor=80486
  181. mov has_CPUID,1 ; We have CPUID support
  182. done:
  183. }
  184. #elif defined(_MSC_VER) && defined(_M_X64)
  185. has_CPUID = 1;
  186. #elif defined(__sun) && defined(__i386)
  187. __asm (
  188. " pushfl \n"
  189. " popl %eax \n"
  190. " movl %eax,%ecx \n"
  191. " xorl $0x200000,%eax \n"
  192. " pushl %eax \n"
  193. " popfl \n"
  194. " pushfl \n"
  195. " popl %eax \n"
  196. " xorl %ecx,%eax \n"
  197. " jz 1f \n"
  198. " movl $1,-8(%ebp) \n"
  199. "1: \n"
  200. );
  201. #elif defined(__sun) && defined(__amd64)
  202. __asm (
  203. " pushfq \n"
  204. " popq %rax \n"
  205. " movq %rax,%rcx \n"
  206. " xorl $0x200000,%eax \n"
  207. " pushq %rax \n"
  208. " popfq \n"
  209. " pushfq \n"
  210. " popq %rax \n"
  211. " xorl %ecx,%eax \n"
  212. " jz 1f \n"
  213. " movl $1,-8(%rbp) \n"
  214. "1: \n"
  215. );
  216. #endif
  217. #endif
  218. /* *INDENT-ON* */ /* clang-format on */
  219. return has_CPUID;
  220. }
  221. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  222. #define cpuid(func, a, b, c, d) \
  223. __asm__ __volatile__( \
  224. " pushl %%ebx \n" \
  225. " xorl %%ecx,%%ecx \n" \
  226. " cpuid \n" \
  227. " movl %%ebx, %%esi \n" \
  228. " popl %%ebx \n" \
  229. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  230. : "a"(func))
  231. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  232. #define cpuid(func, a, b, c, d) \
  233. __asm__ __volatile__( \
  234. " pushq %%rbx \n" \
  235. " xorq %%rcx,%%rcx \n" \
  236. " cpuid \n" \
  237. " movq %%rbx, %%rsi \n" \
  238. " popq %%rbx \n" \
  239. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  240. : "a"(func))
  241. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  242. #define cpuid(func, a, b, c, d) \
  243. __asm { \
  244. __asm mov eax, func \
  245. __asm xor ecx, ecx \
  246. __asm cpuid \
  247. __asm mov a, eax \
  248. __asm mov b, ebx \
  249. __asm mov c, ecx \
  250. __asm mov d, edx \
  251. }
  252. #elif (defined(_MSC_VER) && defined(_M_X64))
  253. /* Use __cpuidex instead of __cpuid because ICL does not clear ecx register */
  254. #define cpuid(func, a, b, c, d) \
  255. { \
  256. int CPUInfo[4]; \
  257. __cpuidex(CPUInfo, func, 0); \
  258. a = CPUInfo[0]; \
  259. b = CPUInfo[1]; \
  260. c = CPUInfo[2]; \
  261. d = CPUInfo[3]; \
  262. }
  263. #else
  264. #define cpuid(func, a, b, c, d) \
  265. do { \
  266. a = b = c = d = 0; \
  267. (void)a; \
  268. (void)b; \
  269. (void)c; \
  270. (void)d; \
  271. } while (0)
  272. #endif
  273. static int CPU_CPUIDFeatures[4];
  274. static int CPU_CPUIDMaxFunction = 0;
  275. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  276. static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
  277. static void CPU_calcCPUIDFeatures(void)
  278. {
  279. static SDL_bool checked = SDL_FALSE;
  280. if (!checked) {
  281. checked = SDL_TRUE;
  282. if (CPU_haveCPUID()) {
  283. int a, b, c, d;
  284. cpuid(0, a, b, c, d);
  285. CPU_CPUIDMaxFunction = a;
  286. if (CPU_CPUIDMaxFunction >= 1) {
  287. cpuid(1, a, b, c, d);
  288. CPU_CPUIDFeatures[0] = a;
  289. CPU_CPUIDFeatures[1] = b;
  290. CPU_CPUIDFeatures[2] = c;
  291. CPU_CPUIDFeatures[3] = d;
  292. /* Check to make sure we can call xgetbv */
  293. if (c & 0x08000000) {
  294. /* Call xgetbv to see if YMM (etc) register state is saved */
  295. #if (defined(__GNUC__) || defined(__llvm__)) && (defined(__i386__) || defined(__x86_64__))
  296. __asm__(".byte 0x0f, 0x01, 0xd0"
  297. : "=a"(a)
  298. : "c"(0)
  299. : "%edx");
  300. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  301. a = (int)_xgetbv(0);
  302. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  303. __asm
  304. {
  305. xor ecx, ecx
  306. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  307. mov a, eax
  308. }
  309. #endif
  310. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  311. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
  312. }
  313. }
  314. }
  315. }
  316. }
  317. static int CPU_haveAltiVec(void)
  318. {
  319. volatile int altivec = 0;
  320. #ifndef SDL_CPUINFO_DISABLED
  321. #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))
  322. #ifdef __OpenBSD__
  323. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  324. #else
  325. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  326. #endif
  327. int hasVectorUnit = 0;
  328. size_t length = sizeof(hasVectorUnit);
  329. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  330. if (0 == error) {
  331. altivec = (hasVectorUnit != 0);
  332. }
  333. #elif defined(__FreeBSD__) && defined(__powerpc__)
  334. unsigned long cpufeatures = 0;
  335. elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures));
  336. altivec = cpufeatures & PPC_FEATURE_HAS_ALTIVEC;
  337. return altivec;
  338. #elif defined(__LINUX__) && defined(__powerpc__) && defined(HAVE_GETAUXVAL)
  339. altivec = getauxval(AT_HWCAP) & PPC_FEATURE_HAS_ALTIVEC;
  340. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  341. void (*handler)(int sig);
  342. handler = signal(SIGILL, illegal_instruction);
  343. if (setjmp(jmpbuf) == 0) {
  344. asm volatile("mtspr 256, %0\n\t"
  345. "vand %%v0, %%v0, %%v0" ::"r"(-1));
  346. altivec = 1;
  347. }
  348. signal(SIGILL, handler);
  349. #endif
  350. #endif
  351. return altivec;
  352. }
  353. #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) || defined(__aarch64__)
  354. static int CPU_haveARMSIMD(void)
  355. {
  356. return 1;
  357. }
  358. #elif !defined(__arm__)
  359. static int CPU_haveARMSIMD(void)
  360. {
  361. return 0;
  362. }
  363. #elif defined(__LINUX__)
  364. static int CPU_haveARMSIMD(void)
  365. {
  366. int arm_simd = 0;
  367. int fd;
  368. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  369. if (fd >= 0) {
  370. Elf32_auxv_t aux;
  371. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  372. if (aux.a_type == AT_PLATFORM) {
  373. const char *plat = (const char *)aux.a_un.a_val;
  374. if (plat) {
  375. arm_simd = SDL_strncmp(plat, "v6l", 3) == 0 ||
  376. SDL_strncmp(plat, "v7l", 3) == 0;
  377. }
  378. }
  379. }
  380. close(fd);
  381. }
  382. return arm_simd;
  383. }
  384. #elif defined(__RISCOS__)
  385. static int CPU_haveARMSIMD(void)
  386. {
  387. _kernel_swi_regs regs;
  388. regs.r[0] = 0;
  389. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  390. return 0;
  391. }
  392. if (!(regs.r[0] & (1 << 31))) {
  393. return 0;
  394. }
  395. regs.r[0] = 34;
  396. regs.r[1] = 29;
  397. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  398. return 0;
  399. }
  400. return regs.r[0];
  401. }
  402. #else
  403. static int CPU_haveARMSIMD(void)
  404. {
  405. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  406. return 0;
  407. }
  408. #endif
  409. #if defined(__LINUX__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  410. static int readProcAuxvForNeon(void)
  411. {
  412. int neon = 0;
  413. int fd;
  414. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  415. if (fd >= 0) {
  416. Elf32_auxv_t aux;
  417. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  418. if (aux.a_type == AT_HWCAP) {
  419. neon = (aux.a_un.a_val & HWCAP_NEON) == HWCAP_NEON;
  420. break;
  421. }
  422. }
  423. close(fd);
  424. }
  425. return neon;
  426. }
  427. #endif
  428. static int CPU_haveNEON(void)
  429. {
  430. /* The way you detect NEON is a privileged instruction on ARM, so you have
  431. query the OS kernel in a platform-specific way. :/ */
  432. #if defined(SDL_CPUINFO_DISABLED)
  433. return 0; /* disabled */
  434. #elif (defined(__WINDOWS__) || defined(__WINRT__) || defined(__GDK__)) && (defined(_M_ARM) || defined(_M_ARM64))
  435. /* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
  436. /* Seems to have been removed */
  437. #if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
  438. #define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  439. #endif
  440. /* All WinRT ARM devices are required to support NEON, but just in case. */
  441. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  442. #elif (defined(__ARM_ARCH) && (__ARM_ARCH >= 8)) || defined(__aarch64__)
  443. return 1; /* ARMv8 always has non-optional NEON support. */
  444. #elif defined(__VITA__)
  445. return 1;
  446. #elif defined(__3DS__)
  447. return 0;
  448. #elif defined(__APPLE__) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  449. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  450. return 1; /* all Apple ARMv7 chips and later have NEON. */
  451. #elif defined(__APPLE__)
  452. return 0; /* assume anything else from Apple doesn't have NEON. */
  453. #elif !defined(__arm__)
  454. return 0; /* not an ARM CPU at all. */
  455. #elif defined(__OpenBSD__)
  456. return 1; /* OpenBSD only supports ARMv7 CPUs that have NEON. */
  457. #elif defined(HAVE_ELF_AUX_INFO)
  458. unsigned long hasneon = 0;
  459. if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0) {
  460. return 0;
  461. }
  462. return ((hasneon & HWCAP_NEON) == HWCAP_NEON);
  463. #elif defined(__QNXNTO__)
  464. return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
  465. #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
  466. return (getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON;
  467. #elif defined(__LINUX__)
  468. return readProcAuxvForNeon();
  469. #elif defined(__ANDROID__)
  470. /* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
  471. {
  472. AndroidCpuFamily cpu_family = android_getCpuFamily();
  473. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  474. uint64_t cpu_features = android_getCpuFeatures();
  475. if (cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) {
  476. return 1;
  477. }
  478. }
  479. return 0;
  480. }
  481. #elif defined(__RISCOS__)
  482. /* Use the VFPSupport_Features SWI to access the MVFR registers */
  483. {
  484. _kernel_swi_regs regs;
  485. regs.r[0] = 0;
  486. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  487. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  488. return 1;
  489. }
  490. }
  491. return 0;
  492. }
  493. #else
  494. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  495. return 0;
  496. #endif
  497. }
  498. static int CPU_readCPUCFG(void)
  499. {
  500. uint32_t cfg2 = 0;
  501. #if defined __loongarch__
  502. __asm__ volatile(
  503. "cpucfg %0, %1 \n\t"
  504. : "+&r"(cfg2)
  505. : "r"(CPU_CFG2));
  506. #endif
  507. return cfg2;
  508. }
  509. #define CPU_haveLSX() (CPU_readCPUCFG() & CPU_CFG2_LSX)
  510. #define CPU_haveLASX() (CPU_readCPUCFG() & CPU_CFG2_LASX)
  511. #if defined(__e2k__)
  512. inline int
  513. CPU_have3DNow(void)
  514. {
  515. #if defined(__3dNOW__)
  516. return 1;
  517. #else
  518. return 0;
  519. #endif
  520. }
  521. #else
  522. static int CPU_have3DNow(void)
  523. {
  524. if (CPU_CPUIDMaxFunction > 0) { /* that is, do we have CPUID at all? */
  525. int a, b, c, d;
  526. cpuid(0x80000000, a, b, c, d);
  527. if (a >= 0x80000001) {
  528. cpuid(0x80000001, a, b, c, d);
  529. return d & 0x80000000;
  530. }
  531. }
  532. return 0;
  533. }
  534. #endif
  535. #if defined(__e2k__)
  536. #define CPU_haveRDTSC() (0)
  537. #if defined(__MMX__)
  538. #define CPU_haveMMX() (1)
  539. #else
  540. #define CPU_haveMMX() (0)
  541. #endif
  542. #if defined(__SSE__)
  543. #define CPU_haveSSE() (1)
  544. #else
  545. #define CPU_haveSSE() (0)
  546. #endif
  547. #if defined(__SSE2__)
  548. #define CPU_haveSSE2() (1)
  549. #else
  550. #define CPU_haveSSE2() (0)
  551. #endif
  552. #if defined(__SSE3__)
  553. #define CPU_haveSSE3() (1)
  554. #else
  555. #define CPU_haveSSE3() (0)
  556. #endif
  557. #if defined(__SSE4_1__)
  558. #define CPU_haveSSE41() (1)
  559. #else
  560. #define CPU_haveSSE41() (0)
  561. #endif
  562. #if defined(__SSE4_2__)
  563. #define CPU_haveSSE42() (1)
  564. #else
  565. #define CPU_haveSSE42() (0)
  566. #endif
  567. #if defined(__AVX__)
  568. #define CPU_haveAVX() (1)
  569. #else
  570. #define CPU_haveAVX() (0)
  571. #endif
  572. #else
  573. #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
  574. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  575. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  576. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  577. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  578. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  579. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  580. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  581. #endif
  582. #if defined(__e2k__)
  583. inline int
  584. CPU_haveAVX2(void)
  585. {
  586. #if defined(__AVX2__)
  587. return 1;
  588. #else
  589. return 0;
  590. #endif
  591. }
  592. #else
  593. static int CPU_haveAVX2(void)
  594. {
  595. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  596. int a, b, c, d;
  597. (void)a;
  598. (void)b;
  599. (void)c;
  600. (void)d; /* compiler warnings... */
  601. cpuid(7, a, b, c, d);
  602. return b & 0x00000020;
  603. }
  604. return 0;
  605. }
  606. #endif
  607. #if defined(__e2k__)
  608. inline int
  609. CPU_haveAVX512F(void)
  610. {
  611. return 0;
  612. }
  613. #else
  614. static int CPU_haveAVX512F(void)
  615. {
  616. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  617. int a, b, c, d;
  618. (void)a;
  619. (void)b;
  620. (void)c;
  621. (void)d; /* compiler warnings... */
  622. cpuid(7, a, b, c, d);
  623. return b & 0x00010000;
  624. }
  625. return 0;
  626. }
  627. #endif
  628. static int SDL_CPUCount = 0;
  629. int SDL_GetCPUCount(void)
  630. {
  631. if (!SDL_CPUCount) {
  632. #ifndef SDL_CPUINFO_DISABLED
  633. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  634. if (SDL_CPUCount <= 0) {
  635. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  636. }
  637. #endif
  638. #ifdef HAVE_SYSCTLBYNAME
  639. if (SDL_CPUCount <= 0) {
  640. size_t size = sizeof(SDL_CPUCount);
  641. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  642. }
  643. #endif
  644. #if defined(__WIN32__) || defined(__GDK__)
  645. if (SDL_CPUCount <= 0) {
  646. SYSTEM_INFO info;
  647. GetSystemInfo(&info);
  648. SDL_CPUCount = info.dwNumberOfProcessors;
  649. }
  650. #endif
  651. #ifdef __OS2__
  652. if (SDL_CPUCount <= 0) {
  653. DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
  654. &SDL_CPUCount, sizeof(SDL_CPUCount) );
  655. }
  656. #endif
  657. #endif
  658. /* There has to be at least 1, right? :) */
  659. if (SDL_CPUCount <= 0) {
  660. SDL_CPUCount = 1;
  661. }
  662. }
  663. return SDL_CPUCount;
  664. }
  665. #if defined(__e2k__)
  666. inline const char *
  667. SDL_GetCPUType(void)
  668. {
  669. static char SDL_CPUType[13];
  670. SDL_strlcpy(SDL_CPUType, "E2K MACHINE", sizeof(SDL_CPUType));
  671. return SDL_CPUType;
  672. }
  673. #else
  674. /* Oh, such a sweet sweet trick, just not very useful. :) */
  675. static const char *SDL_GetCPUType(void)
  676. {
  677. static char SDL_CPUType[13];
  678. if (!SDL_CPUType[0]) {
  679. int i = 0;
  680. CPU_calcCPUIDFeatures();
  681. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  682. int a, b, c, d;
  683. cpuid(0x00000000, a, b, c, d);
  684. (void)a;
  685. SDL_CPUType[i++] = (char)(b & 0xff);
  686. b >>= 8;
  687. SDL_CPUType[i++] = (char)(b & 0xff);
  688. b >>= 8;
  689. SDL_CPUType[i++] = (char)(b & 0xff);
  690. b >>= 8;
  691. SDL_CPUType[i++] = (char)(b & 0xff);
  692. SDL_CPUType[i++] = (char)(d & 0xff);
  693. d >>= 8;
  694. SDL_CPUType[i++] = (char)(d & 0xff);
  695. d >>= 8;
  696. SDL_CPUType[i++] = (char)(d & 0xff);
  697. d >>= 8;
  698. SDL_CPUType[i++] = (char)(d & 0xff);
  699. SDL_CPUType[i++] = (char)(c & 0xff);
  700. c >>= 8;
  701. SDL_CPUType[i++] = (char)(c & 0xff);
  702. c >>= 8;
  703. SDL_CPUType[i++] = (char)(c & 0xff);
  704. c >>= 8;
  705. SDL_CPUType[i++] = (char)(c & 0xff);
  706. }
  707. if (!SDL_CPUType[0]) {
  708. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  709. }
  710. }
  711. return SDL_CPUType;
  712. }
  713. #endif
  714. #ifdef TEST_MAIN /* !!! FIXME: only used for test at the moment. */
  715. #if defined(__e2k__)
  716. inline const char *
  717. SDL_GetCPUName(void)
  718. {
  719. static char SDL_CPUName[48];
  720. SDL_strlcpy(SDL_CPUName, __builtin_cpu_name(), sizeof(SDL_CPUName));
  721. return SDL_CPUName;
  722. }
  723. #else
  724. static const char *SDL_GetCPUName(void)
  725. {
  726. static char SDL_CPUName[48];
  727. if (!SDL_CPUName[0]) {
  728. int i = 0;
  729. int a, b, c, d;
  730. CPU_calcCPUIDFeatures();
  731. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  732. cpuid(0x80000000, a, b, c, d);
  733. if (a >= 0x80000004) {
  734. cpuid(0x80000002, a, b, c, d);
  735. SDL_CPUName[i++] = (char)(a & 0xff);
  736. a >>= 8;
  737. SDL_CPUName[i++] = (char)(a & 0xff);
  738. a >>= 8;
  739. SDL_CPUName[i++] = (char)(a & 0xff);
  740. a >>= 8;
  741. SDL_CPUName[i++] = (char)(a & 0xff);
  742. a >>= 8;
  743. SDL_CPUName[i++] = (char)(b & 0xff);
  744. b >>= 8;
  745. SDL_CPUName[i++] = (char)(b & 0xff);
  746. b >>= 8;
  747. SDL_CPUName[i++] = (char)(b & 0xff);
  748. b >>= 8;
  749. SDL_CPUName[i++] = (char)(b & 0xff);
  750. b >>= 8;
  751. SDL_CPUName[i++] = (char)(c & 0xff);
  752. c >>= 8;
  753. SDL_CPUName[i++] = (char)(c & 0xff);
  754. c >>= 8;
  755. SDL_CPUName[i++] = (char)(c & 0xff);
  756. c >>= 8;
  757. SDL_CPUName[i++] = (char)(c & 0xff);
  758. c >>= 8;
  759. SDL_CPUName[i++] = (char)(d & 0xff);
  760. d >>= 8;
  761. SDL_CPUName[i++] = (char)(d & 0xff);
  762. d >>= 8;
  763. SDL_CPUName[i++] = (char)(d & 0xff);
  764. d >>= 8;
  765. SDL_CPUName[i++] = (char)(d & 0xff);
  766. d >>= 8;
  767. cpuid(0x80000003, a, b, c, d);
  768. SDL_CPUName[i++] = (char)(a & 0xff);
  769. a >>= 8;
  770. SDL_CPUName[i++] = (char)(a & 0xff);
  771. a >>= 8;
  772. SDL_CPUName[i++] = (char)(a & 0xff);
  773. a >>= 8;
  774. SDL_CPUName[i++] = (char)(a & 0xff);
  775. a >>= 8;
  776. SDL_CPUName[i++] = (char)(b & 0xff);
  777. b >>= 8;
  778. SDL_CPUName[i++] = (char)(b & 0xff);
  779. b >>= 8;
  780. SDL_CPUName[i++] = (char)(b & 0xff);
  781. b >>= 8;
  782. SDL_CPUName[i++] = (char)(b & 0xff);
  783. b >>= 8;
  784. SDL_CPUName[i++] = (char)(c & 0xff);
  785. c >>= 8;
  786. SDL_CPUName[i++] = (char)(c & 0xff);
  787. c >>= 8;
  788. SDL_CPUName[i++] = (char)(c & 0xff);
  789. c >>= 8;
  790. SDL_CPUName[i++] = (char)(c & 0xff);
  791. c >>= 8;
  792. SDL_CPUName[i++] = (char)(d & 0xff);
  793. d >>= 8;
  794. SDL_CPUName[i++] = (char)(d & 0xff);
  795. d >>= 8;
  796. SDL_CPUName[i++] = (char)(d & 0xff);
  797. d >>= 8;
  798. SDL_CPUName[i++] = (char)(d & 0xff);
  799. d >>= 8;
  800. cpuid(0x80000004, a, b, c, d);
  801. SDL_CPUName[i++] = (char)(a & 0xff);
  802. a >>= 8;
  803. SDL_CPUName[i++] = (char)(a & 0xff);
  804. a >>= 8;
  805. SDL_CPUName[i++] = (char)(a & 0xff);
  806. a >>= 8;
  807. SDL_CPUName[i++] = (char)(a & 0xff);
  808. a >>= 8;
  809. SDL_CPUName[i++] = (char)(b & 0xff);
  810. b >>= 8;
  811. SDL_CPUName[i++] = (char)(b & 0xff);
  812. b >>= 8;
  813. SDL_CPUName[i++] = (char)(b & 0xff);
  814. b >>= 8;
  815. SDL_CPUName[i++] = (char)(b & 0xff);
  816. b >>= 8;
  817. SDL_CPUName[i++] = (char)(c & 0xff);
  818. c >>= 8;
  819. SDL_CPUName[i++] = (char)(c & 0xff);
  820. c >>= 8;
  821. SDL_CPUName[i++] = (char)(c & 0xff);
  822. c >>= 8;
  823. SDL_CPUName[i++] = (char)(c & 0xff);
  824. c >>= 8;
  825. SDL_CPUName[i++] = (char)(d & 0xff);
  826. d >>= 8;
  827. SDL_CPUName[i++] = (char)(d & 0xff);
  828. d >>= 8;
  829. SDL_CPUName[i++] = (char)(d & 0xff);
  830. d >>= 8;
  831. SDL_CPUName[i++] = (char)(d & 0xff);
  832. d >>= 8;
  833. }
  834. }
  835. if (!SDL_CPUName[0]) {
  836. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  837. }
  838. }
  839. return SDL_CPUName;
  840. }
  841. #endif
  842. #endif
  843. int SDL_GetCPUCacheLineSize(void)
  844. {
  845. const char *cpuType = SDL_GetCPUType();
  846. int cacheline_size = SDL_CACHELINE_SIZE; /* initial guess */
  847. int a, b, c, d;
  848. (void)a;
  849. (void)b;
  850. (void)c;
  851. (void)d;
  852. if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
  853. cpuid(0x00000001, a, b, c, d);
  854. cacheline_size = ((b >> 8) & 0xff) * 8;
  855. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  856. cpuid(0x80000005, a, b, c, d);
  857. cacheline_size = c & 0xff;
  858. } else {
  859. #if defined(HAVE_SYSCONF) && defined(_SC_LEVEL1_DCACHE_LINESIZE)
  860. if ((cacheline_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE)) > 0) {
  861. return cacheline_size;
  862. } else {
  863. cacheline_size = SDL_CACHELINE_SIZE;
  864. }
  865. #endif
  866. #if defined(__LINUX__)
  867. {
  868. FILE *f = fopen("/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size", "r");
  869. if (f) {
  870. int size;
  871. if (fscanf(f, "%d", &size) == 1) {
  872. cacheline_size = size;
  873. }
  874. fclose(f);
  875. }
  876. }
  877. #elif defined(__FreeBSD__) && defined(CACHE_LINE_SIZE)
  878. cacheline_size = CACHE_LINE_SIZE;
  879. #endif
  880. }
  881. return cacheline_size;
  882. }
  883. static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
  884. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  885. static Uint32 SDL_GetCPUFeatures(void)
  886. {
  887. if (SDL_CPUFeatures == 0xFFFFFFFF) {
  888. CPU_calcCPUIDFeatures();
  889. SDL_CPUFeatures = 0;
  890. SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
  891. if (CPU_haveRDTSC()) {
  892. SDL_CPUFeatures |= CPU_HAS_RDTSC;
  893. }
  894. if (CPU_haveAltiVec()) {
  895. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  896. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  897. }
  898. if (CPU_haveMMX()) {
  899. SDL_CPUFeatures |= CPU_HAS_MMX;
  900. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  901. }
  902. if (CPU_have3DNow()) {
  903. SDL_CPUFeatures |= CPU_HAS_3DNOW;
  904. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  905. }
  906. if (CPU_haveSSE()) {
  907. SDL_CPUFeatures |= CPU_HAS_SSE;
  908. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  909. }
  910. if (CPU_haveSSE2()) {
  911. SDL_CPUFeatures |= CPU_HAS_SSE2;
  912. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  913. }
  914. if (CPU_haveSSE3()) {
  915. SDL_CPUFeatures |= CPU_HAS_SSE3;
  916. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  917. }
  918. if (CPU_haveSSE41()) {
  919. SDL_CPUFeatures |= CPU_HAS_SSE41;
  920. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  921. }
  922. if (CPU_haveSSE42()) {
  923. SDL_CPUFeatures |= CPU_HAS_SSE42;
  924. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  925. }
  926. if (CPU_haveAVX()) {
  927. SDL_CPUFeatures |= CPU_HAS_AVX;
  928. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  929. }
  930. if (CPU_haveAVX2()) {
  931. SDL_CPUFeatures |= CPU_HAS_AVX2;
  932. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  933. }
  934. if (CPU_haveAVX512F()) {
  935. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  936. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  937. }
  938. if (CPU_haveARMSIMD()) {
  939. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  940. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  941. }
  942. if (CPU_haveNEON()) {
  943. SDL_CPUFeatures |= CPU_HAS_NEON;
  944. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  945. }
  946. if (CPU_haveLSX()) {
  947. SDL_CPUFeatures |= CPU_HAS_LSX;
  948. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  949. }
  950. if (CPU_haveLASX()) {
  951. SDL_CPUFeatures |= CPU_HAS_LASX;
  952. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  953. }
  954. }
  955. return SDL_CPUFeatures;
  956. }
  957. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
  958. SDL_bool SDL_HasRDTSC(void)
  959. {
  960. return CPU_FEATURE_AVAILABLE(CPU_HAS_RDTSC);
  961. }
  962. SDL_bool SDL_HasAltiVec(void)
  963. {
  964. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  965. }
  966. SDL_bool SDL_HasMMX(void)
  967. {
  968. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  969. }
  970. SDL_bool SDL_Has3DNow(void)
  971. {
  972. return CPU_FEATURE_AVAILABLE(CPU_HAS_3DNOW);
  973. }
  974. SDL_bool SDL_HasSSE(void)
  975. {
  976. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  977. }
  978. SDL_bool SDL_HasSSE2(void)
  979. {
  980. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  981. }
  982. SDL_bool SDL_HasSSE3(void)
  983. {
  984. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  985. }
  986. SDL_bool SDL_HasSSE41(void)
  987. {
  988. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  989. }
  990. SDL_bool SDL_HasSSE42(void)
  991. {
  992. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  993. }
  994. SDL_bool SDL_HasAVX(void)
  995. {
  996. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  997. }
  998. SDL_bool SDL_HasAVX2(void)
  999. {
  1000. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  1001. }
  1002. SDL_bool SDL_HasAVX512F(void)
  1003. {
  1004. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  1005. }
  1006. SDL_bool SDL_HasARMSIMD(void)
  1007. {
  1008. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  1009. }
  1010. SDL_bool SDL_HasNEON(void)
  1011. {
  1012. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  1013. }
  1014. SDL_bool SDL_HasLSX(void)
  1015. {
  1016. return CPU_FEATURE_AVAILABLE(CPU_HAS_LSX);
  1017. }
  1018. SDL_bool SDL_HasLASX(void)
  1019. {
  1020. return CPU_FEATURE_AVAILABLE(CPU_HAS_LASX);
  1021. }
  1022. static int SDL_SystemRAM = 0;
  1023. int SDL_GetSystemRAM(void)
  1024. {
  1025. if (!SDL_SystemRAM) {
  1026. #ifndef SDL_CPUINFO_DISABLED
  1027. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  1028. if (SDL_SystemRAM <= 0) {
  1029. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024 * 1024));
  1030. }
  1031. #endif
  1032. #ifdef HAVE_SYSCTLBYNAME
  1033. if (SDL_SystemRAM <= 0) {
  1034. #ifdef HW_PHYSMEM64
  1035. /* (64-bit): NetBSD since 2003, OpenBSD */
  1036. int mib[2] = { CTL_HW, HW_PHYSMEM64 };
  1037. #elif defined(HW_REALMEM)
  1038. /* (64-bit): FreeBSD since 2005, DragonFly */
  1039. int mib[2] = { CTL_HW, HW_REALMEM };
  1040. #elif defined(HW_MEMSIZE)
  1041. /* (64-bit): Darwin */
  1042. int mib[2] = { CTL_HW, HW_MEMSIZE };
  1043. #else
  1044. /* (32-bit): very old BSD, might only report up to 2 GiB */
  1045. int mib[2] = { CTL_HW, HW_PHYSMEM };
  1046. #endif /* HW_PHYSMEM64 */
  1047. Uint64 memsize = 0;
  1048. size_t len = sizeof(memsize);
  1049. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  1050. SDL_SystemRAM = (int)(memsize / (1024 * 1024));
  1051. }
  1052. }
  1053. #endif
  1054. #if defined(__WIN32__) || defined(__GDK__)
  1055. if (SDL_SystemRAM <= 0) {
  1056. MEMORYSTATUSEX stat;
  1057. stat.dwLength = sizeof(stat);
  1058. if (GlobalMemoryStatusEx(&stat)) {
  1059. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  1060. }
  1061. }
  1062. #endif
  1063. #ifdef __OS2__
  1064. if (SDL_SystemRAM <= 0) {
  1065. Uint32 sysram = 0;
  1066. DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
  1067. SDL_SystemRAM = (int) (sysram / 0x100000U);
  1068. }
  1069. #endif
  1070. #ifdef __RISCOS__
  1071. if (SDL_SystemRAM <= 0) {
  1072. _kernel_swi_regs regs;
  1073. regs.r[0] = 0x108;
  1074. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  1075. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  1076. }
  1077. }
  1078. #endif
  1079. #ifdef __VITA__
  1080. if (SDL_SystemRAM <= 0) {
  1081. /* Vita has 512MiB on SoC, that's split into 256MiB(+109MiB in extended memory mode) for app
  1082. +26MiB of physically continuous memory, +112MiB of CDRAM(VRAM) + system reserved memory. */
  1083. SDL_SystemRAM = 536870912;
  1084. }
  1085. #endif
  1086. #ifdef __PS2__
  1087. if (SDL_SystemRAM <= 0) {
  1088. /* PlayStation 2 has 32MiB however there are some special models with 64 and 128 */
  1089. SDL_SystemRAM = GetMemorySize();
  1090. }
  1091. #endif
  1092. #endif
  1093. }
  1094. return SDL_SystemRAM;
  1095. }
  1096. size_t SDL_SIMDGetAlignment(void)
  1097. {
  1098. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  1099. SDL_GetCPUFeatures(); /* make sure this has been calculated */
  1100. }
  1101. SDL_assert(SDL_SIMDAlignment != 0);
  1102. return SDL_SIMDAlignment;
  1103. }
  1104. void *SDL_SIMDAlloc(const size_t len)
  1105. {
  1106. const size_t alignment = SDL_SIMDGetAlignment();
  1107. const size_t padding = (alignment - (len % alignment)) % alignment;
  1108. Uint8 *retval = NULL;
  1109. Uint8 *ptr;
  1110. size_t to_allocate;
  1111. /* alignment + padding + sizeof(void *) is bounded (a few hundred
  1112. * bytes max), so no need to check for overflow within that argument */
  1113. if (SDL_size_add_overflow(len, alignment + padding + sizeof(void *), &to_allocate)) {
  1114. return NULL;
  1115. }
  1116. ptr = (Uint8 *)SDL_malloc(to_allocate);
  1117. if (ptr) {
  1118. /* store the actual allocated pointer right before our aligned pointer. */
  1119. retval = ptr + sizeof(void *);
  1120. retval += alignment - (((size_t)retval) % alignment);
  1121. *(((void **)retval) - 1) = ptr;
  1122. }
  1123. return retval;
  1124. }
  1125. void *SDL_SIMDRealloc(void *mem, const size_t len)
  1126. {
  1127. const size_t alignment = SDL_SIMDGetAlignment();
  1128. const size_t padding = (alignment - (len % alignment)) % alignment;
  1129. Uint8 *retval = (Uint8 *)mem;
  1130. void *oldmem = mem;
  1131. size_t memdiff = 0, ptrdiff;
  1132. Uint8 *ptr;
  1133. size_t to_allocate;
  1134. /* alignment + padding + sizeof(void *) is bounded (a few hundred
  1135. * bytes max), so no need to check for overflow within that argument */
  1136. if (SDL_size_add_overflow(len, alignment + padding + sizeof(void *), &to_allocate)) {
  1137. return NULL;
  1138. }
  1139. if (mem) {
  1140. mem = *(((void **)mem) - 1);
  1141. /* Check the delta between the real pointer and user pointer */
  1142. memdiff = ((size_t)oldmem) - ((size_t)mem);
  1143. }
  1144. ptr = (Uint8 *)SDL_realloc(mem, to_allocate);
  1145. if (!ptr) {
  1146. return NULL; /* Out of memory, bail! */
  1147. }
  1148. /* Store the actual allocated pointer right before our aligned pointer. */
  1149. retval = ptr + sizeof(void *);
  1150. retval += alignment - (((size_t)retval) % alignment);
  1151. /* Make sure the delta is the same! */
  1152. if (mem) {
  1153. ptrdiff = ((size_t)retval) - ((size_t)ptr);
  1154. if (memdiff != ptrdiff) { /* Delta has changed, copy to new offset! */
  1155. oldmem = (void *)(((uintptr_t)ptr) + memdiff);
  1156. /* Even though the data past the old `len` is undefined, this is the
  1157. * only length value we have, and it guarantees that we copy all the
  1158. * previous memory anyhow.
  1159. */
  1160. SDL_memmove(retval, oldmem, len);
  1161. }
  1162. }
  1163. /* Actually store the allocated pointer, finally. */
  1164. *(((void **)retval) - 1) = ptr;
  1165. return retval;
  1166. }
  1167. void SDL_SIMDFree(void *ptr)
  1168. {
  1169. if (ptr) {
  1170. SDL_free(*(((void **)ptr) - 1));
  1171. }
  1172. }
  1173. #ifdef TEST_MAIN
  1174. #include <stdio.h>
  1175. int main(void)
  1176. {
  1177. printf("CPU count: %d\n", SDL_GetCPUCount());
  1178. printf("CPU type: %s\n", SDL_GetCPUType());
  1179. printf("CPU name: %s\n", SDL_GetCPUName());
  1180. printf("CacheLine size: %d\n", SDL_GetCPUCacheLineSize());
  1181. printf("RDTSC: %d\n", SDL_HasRDTSC());
  1182. printf("Altivec: %d\n", SDL_HasAltiVec());
  1183. printf("MMX: %d\n", SDL_HasMMX());
  1184. printf("3DNow: %d\n", SDL_Has3DNow());
  1185. printf("SSE: %d\n", SDL_HasSSE());
  1186. printf("SSE2: %d\n", SDL_HasSSE2());
  1187. printf("SSE3: %d\n", SDL_HasSSE3());
  1188. printf("SSE4.1: %d\n", SDL_HasSSE41());
  1189. printf("SSE4.2: %d\n", SDL_HasSSE42());
  1190. printf("AVX: %d\n", SDL_HasAVX());
  1191. printf("AVX2: %d\n", SDL_HasAVX2());
  1192. printf("AVX-512F: %d\n", SDL_HasAVX512F());
  1193. printf("ARM SIMD: %d\n", SDL_HasARMSIMD());
  1194. printf("NEON: %d\n", SDL_HasNEON());
  1195. printf("LSX: %d\n", SDL_HasLSX());
  1196. printf("LASX: %d\n", SDL_HasLASX());
  1197. printf("RAM: %d MB\n", SDL_GetSystemRAM());
  1198. return 0;
  1199. }
  1200. #endif /* TEST_MAIN */
  1201. /* vi: set ts=4 sw=4 expandtab: */