SDL_cpuinfo.c 36 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2022 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #ifdef TEST_MAIN
  19. #include "SDL_config.h"
  20. #else
  21. #include "../SDL_internal.h"
  22. #endif
  23. #if defined(__WIN32__) || defined(__WINRT__)
  24. #include "../core/windows/SDL_windows.h"
  25. #endif
  26. #if defined(__OS2__)
  27. #undef HAVE_SYSCTLBYNAME
  28. #define INCL_DOS
  29. #include <os2.h>
  30. #ifndef QSV_NUMPROCESSORS
  31. #define QSV_NUMPROCESSORS 26
  32. #endif
  33. #endif
  34. /* CPU feature detection for SDL */
  35. #include "SDL_cpuinfo.h"
  36. #include "SDL_assert.h"
  37. #ifdef HAVE_SYSCONF
  38. #include <unistd.h>
  39. #endif
  40. #ifdef HAVE_SYSCTLBYNAME
  41. #include <sys/types.h>
  42. #include <sys/sysctl.h>
  43. #endif
  44. #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
  45. #include <sys/sysctl.h> /* For AltiVec check */
  46. #elif defined(__OpenBSD__) && defined(__powerpc__)
  47. #include <sys/param.h>
  48. #include <sys/sysctl.h> /* For AltiVec check */
  49. #include <machine/cpu.h>
  50. #elif defined(__FreeBSD__) && defined(__powerpc__)
  51. #include <machine/cpu.h>
  52. #include <sys/auxv.h>
  53. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  54. #include <signal.h>
  55. #include <setjmp.h>
  56. #endif
  57. #if defined(__QNXNTO__)
  58. #include <sys/syspage.h>
  59. #endif
  60. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__arm__)
  61. #include <unistd.h>
  62. #include <sys/types.h>
  63. #include <sys/stat.h>
  64. #include <fcntl.h>
  65. #include <elf.h>
  66. /*#include <asm/hwcap.h>*/
  67. #ifndef AT_HWCAP
  68. #define AT_HWCAP 16
  69. #endif
  70. #ifndef AT_PLATFORM
  71. #define AT_PLATFORM 15
  72. #endif
  73. #ifndef HWCAP_NEON
  74. #define HWCAP_NEON (1 << 12)
  75. #endif
  76. #endif
  77. #if defined(__ANDROID__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  78. #include <cpu-features.h>
  79. #endif
  80. #if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
  81. #include <sys/auxv.h>
  82. #endif
  83. #ifdef __RISCOS__
  84. #include <kernel.h>
  85. #include <swis.h>
  86. #endif
  87. #define CPU_HAS_RDTSC (1 << 0)
  88. #define CPU_HAS_ALTIVEC (1 << 1)
  89. #define CPU_HAS_MMX (1 << 2)
  90. #define CPU_HAS_3DNOW (1 << 3)
  91. #define CPU_HAS_SSE (1 << 4)
  92. #define CPU_HAS_SSE2 (1 << 5)
  93. #define CPU_HAS_SSE3 (1 << 6)
  94. #define CPU_HAS_SSE41 (1 << 7)
  95. #define CPU_HAS_SSE42 (1 << 8)
  96. #define CPU_HAS_AVX (1 << 9)
  97. #define CPU_HAS_AVX2 (1 << 10)
  98. #define CPU_HAS_NEON (1 << 11)
  99. #define CPU_HAS_AVX512F (1 << 12)
  100. #define CPU_HAS_ARM_SIMD (1 << 13)
  101. #define CPU_HAS_LSX (1 << 14)
  102. #define CPU_HAS_LASX (1 << 15)
  103. #define CPU_CFG2 0x2
  104. #define CPU_CFG2_LSX (1 << 6)
  105. #define CPU_CFG2_LASX (1 << 7)
  106. #if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__ && !__FreeBSD__
  107. /* This is the brute force way of detecting instruction sets...
  108. the idea is borrowed from the libmpeg2 library - thanks!
  109. */
  110. static jmp_buf jmpbuf;
  111. static void
  112. illegal_instruction(int sig)
  113. {
  114. longjmp(jmpbuf, 1);
  115. }
  116. #endif /* HAVE_SETJMP */
  117. static int
  118. CPU_haveCPUID(void)
  119. {
  120. int has_CPUID = 0;
  121. /* *INDENT-OFF* */ /* clang-format off */
  122. #ifndef SDL_CPUINFO_DISABLED
  123. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  124. __asm__ (
  125. " pushfl # Get original EFLAGS \n"
  126. " popl %%eax \n"
  127. " movl %%eax,%%ecx \n"
  128. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  129. " pushl %%eax # Save new EFLAGS value on stack \n"
  130. " popfl # Replace current EFLAGS value \n"
  131. " pushfl # Get new EFLAGS \n"
  132. " popl %%eax # Store new EFLAGS in EAX \n"
  133. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  134. " jz 1f # Processor=80486 \n"
  135. " movl $1,%0 # We have CPUID support \n"
  136. "1: \n"
  137. : "=m" (has_CPUID)
  138. :
  139. : "%eax", "%ecx"
  140. );
  141. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  142. /* Technically, if this is being compiled under __x86_64__ then it has
  143. CPUid by definition. But it's nice to be able to prove it. :) */
  144. __asm__ (
  145. " pushfq # Get original EFLAGS \n"
  146. " popq %%rax \n"
  147. " movq %%rax,%%rcx \n"
  148. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  149. " pushq %%rax # Save new EFLAGS value on stack \n"
  150. " popfq # Replace current EFLAGS value \n"
  151. " pushfq # Get new EFLAGS \n"
  152. " popq %%rax # Store new EFLAGS in EAX \n"
  153. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  154. " jz 1f # Processor=80486 \n"
  155. " movl $1,%0 # We have CPUID support \n"
  156. "1: \n"
  157. : "=m" (has_CPUID)
  158. :
  159. : "%rax", "%rcx"
  160. );
  161. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  162. __asm {
  163. pushfd ; Get original EFLAGS
  164. pop eax
  165. mov ecx, eax
  166. xor eax, 200000h ; Flip ID bit in EFLAGS
  167. push eax ; Save new EFLAGS value on stack
  168. popfd ; Replace current EFLAGS value
  169. pushfd ; Get new EFLAGS
  170. pop eax ; Store new EFLAGS in EAX
  171. xor eax, ecx ; Can not toggle ID bit,
  172. jz done ; Processor=80486
  173. mov has_CPUID,1 ; We have CPUID support
  174. done:
  175. }
  176. #elif defined(_MSC_VER) && defined(_M_X64)
  177. has_CPUID = 1;
  178. #elif defined(__sun) && defined(__i386)
  179. __asm (
  180. " pushfl \n"
  181. " popl %eax \n"
  182. " movl %eax,%ecx \n"
  183. " xorl $0x200000,%eax \n"
  184. " pushl %eax \n"
  185. " popfl \n"
  186. " pushfl \n"
  187. " popl %eax \n"
  188. " xorl %ecx,%eax \n"
  189. " jz 1f \n"
  190. " movl $1,-8(%ebp) \n"
  191. "1: \n"
  192. );
  193. #elif defined(__sun) && defined(__amd64)
  194. __asm (
  195. " pushfq \n"
  196. " popq %rax \n"
  197. " movq %rax,%rcx \n"
  198. " xorl $0x200000,%eax \n"
  199. " pushq %rax \n"
  200. " popfq \n"
  201. " pushfq \n"
  202. " popq %rax \n"
  203. " xorl %ecx,%eax \n"
  204. " jz 1f \n"
  205. " movl $1,-8(%rbp) \n"
  206. "1: \n"
  207. );
  208. #endif
  209. #endif
  210. /* *INDENT-ON* */ /* clang-format on */
  211. return has_CPUID;
  212. }
  213. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  214. #define cpuid(func, a, b, c, d) \
  215. __asm__ __volatile__ ( \
  216. " pushl %%ebx \n" \
  217. " xorl %%ecx,%%ecx \n" \
  218. " cpuid \n" \
  219. " movl %%ebx, %%esi \n" \
  220. " popl %%ebx \n" : \
  221. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  222. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  223. #define cpuid(func, a, b, c, d) \
  224. __asm__ __volatile__ ( \
  225. " pushq %%rbx \n" \
  226. " xorq %%rcx,%%rcx \n" \
  227. " cpuid \n" \
  228. " movq %%rbx, %%rsi \n" \
  229. " popq %%rbx \n" : \
  230. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  231. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  232. #define cpuid(func, a, b, c, d) \
  233. __asm { \
  234. __asm mov eax, func \
  235. __asm xor ecx, ecx \
  236. __asm cpuid \
  237. __asm mov a, eax \
  238. __asm mov b, ebx \
  239. __asm mov c, ecx \
  240. __asm mov d, edx \
  241. }
  242. #elif defined(_MSC_VER) && defined(_M_X64)
  243. #define cpuid(func, a, b, c, d) \
  244. { \
  245. int CPUInfo[4]; \
  246. __cpuid(CPUInfo, func); \
  247. a = CPUInfo[0]; \
  248. b = CPUInfo[1]; \
  249. c = CPUInfo[2]; \
  250. d = CPUInfo[3]; \
  251. }
  252. #else
  253. #define cpuid(func, a, b, c, d) \
  254. do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
  255. #endif
  256. static int CPU_CPUIDFeatures[4];
  257. static int CPU_CPUIDMaxFunction = 0;
  258. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  259. static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
  260. static void
  261. CPU_calcCPUIDFeatures(void)
  262. {
  263. static SDL_bool checked = SDL_FALSE;
  264. if (!checked) {
  265. checked = SDL_TRUE;
  266. if (CPU_haveCPUID()) {
  267. int a, b, c, d;
  268. cpuid(0, a, b, c, d);
  269. CPU_CPUIDMaxFunction = a;
  270. if (CPU_CPUIDMaxFunction >= 1) {
  271. cpuid(1, a, b, c, d);
  272. CPU_CPUIDFeatures[0] = a;
  273. CPU_CPUIDFeatures[1] = b;
  274. CPU_CPUIDFeatures[2] = c;
  275. CPU_CPUIDFeatures[3] = d;
  276. /* Check to make sure we can call xgetbv */
  277. if (c & 0x08000000) {
  278. /* Call xgetbv to see if YMM (etc) register state is saved */
  279. #if (defined(__GNUC__) || defined(__llvm__)) && (defined(__i386__) || defined(__x86_64__))
  280. __asm__(".byte 0x0f, 0x01, 0xd0" : "=a" (a) : "c" (0) : "%edx");
  281. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  282. a = (int)_xgetbv(0);
  283. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  284. __asm
  285. {
  286. xor ecx, ecx
  287. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  288. mov a, eax
  289. }
  290. #endif
  291. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  292. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
  293. }
  294. }
  295. }
  296. }
  297. }
  298. static int
  299. CPU_haveAltiVec(void)
  300. {
  301. volatile int altivec = 0;
  302. #ifndef SDL_CPUINFO_DISABLED
  303. #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))
  304. #ifdef __OpenBSD__
  305. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  306. #else
  307. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  308. #endif
  309. int hasVectorUnit = 0;
  310. size_t length = sizeof(hasVectorUnit);
  311. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  312. if (0 == error)
  313. altivec = (hasVectorUnit != 0);
  314. #elif defined(__FreeBSD__) && defined(__powerpc__)
  315. unsigned long cpufeatures = 0;
  316. elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures));
  317. altivec = cpufeatures & PPC_FEATURE_HAS_ALTIVEC;
  318. return altivec;
  319. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  320. void (*handler) (int sig);
  321. handler = signal(SIGILL, illegal_instruction);
  322. if (setjmp(jmpbuf) == 0) {
  323. asm volatile ("mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::"r" (-1));
  324. altivec = 1;
  325. }
  326. signal(SIGILL, handler);
  327. #endif
  328. #endif
  329. return altivec;
  330. }
  331. #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) || defined(__aarch64__)
  332. static int
  333. CPU_haveARMSIMD(void)
  334. {
  335. return 1;
  336. }
  337. #elif !defined(__arm__)
  338. static int
  339. CPU_haveARMSIMD(void)
  340. {
  341. return 0;
  342. }
  343. #elif defined(__LINUX__)
  344. static int
  345. CPU_haveARMSIMD(void)
  346. {
  347. int arm_simd = 0;
  348. int fd;
  349. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  350. if (fd >= 0)
  351. {
  352. Elf32_auxv_t aux;
  353. while (read(fd, &aux, sizeof aux) == sizeof aux)
  354. {
  355. if (aux.a_type == AT_PLATFORM)
  356. {
  357. const char *plat = (const char *) aux.a_un.a_val;
  358. if (plat) {
  359. arm_simd = SDL_strncmp(plat, "v6l", 3) == 0 ||
  360. SDL_strncmp(plat, "v7l", 3) == 0;
  361. }
  362. }
  363. }
  364. close(fd);
  365. }
  366. return arm_simd;
  367. }
  368. #elif defined(__RISCOS__)
  369. static int
  370. CPU_haveARMSIMD(void)
  371. {
  372. _kernel_swi_regs regs;
  373. regs.r[0] = 0;
  374. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  375. return 0;
  376. if (!(regs.r[0] & (1<<31)))
  377. return 0;
  378. regs.r[0] = 34;
  379. regs.r[1] = 29;
  380. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  381. return 0;
  382. return regs.r[0];
  383. }
  384. #else
  385. static int
  386. CPU_haveARMSIMD(void)
  387. {
  388. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  389. return 0;
  390. }
  391. #endif
  392. #if defined(__LINUX__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  393. static int
  394. readProcAuxvForNeon(void)
  395. {
  396. int neon = 0;
  397. int fd;
  398. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  399. if (fd >= 0)
  400. {
  401. Elf32_auxv_t aux;
  402. while (read(fd, &aux, sizeof (aux)) == sizeof (aux)) {
  403. if (aux.a_type == AT_HWCAP) {
  404. neon = (aux.a_un.a_val & HWCAP_NEON) == HWCAP_NEON;
  405. break;
  406. }
  407. }
  408. close(fd);
  409. }
  410. return neon;
  411. }
  412. #endif
  413. static int
  414. CPU_haveNEON(void)
  415. {
  416. /* The way you detect NEON is a privileged instruction on ARM, so you have
  417. query the OS kernel in a platform-specific way. :/ */
  418. #if defined(SDL_CPUINFO_DISABLED)
  419. return 0; /* disabled */
  420. #elif (defined(__WINDOWS__) || defined(__WINRT__)) && (defined(_M_ARM) || defined(_M_ARM64))
  421. /* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
  422. /* Seems to have been removed */
  423. # if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
  424. # define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  425. # endif
  426. /* All WinRT ARM devices are required to support NEON, but just in case. */
  427. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  428. #elif (defined(__ARM_ARCH) && (__ARM_ARCH >= 8)) || defined(__aarch64__)
  429. return 1; /* ARMv8 always has non-optional NEON support. */
  430. #elif __VITA__
  431. return 1;
  432. #elif defined(__APPLE__) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  433. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  434. return 1; /* all Apple ARMv7 chips and later have NEON. */
  435. #elif defined(__APPLE__)
  436. return 0; /* assume anything else from Apple doesn't have NEON. */
  437. #elif !defined(__arm__)
  438. return 0; /* not an ARM CPU at all. */
  439. #elif defined(__OpenBSD__)
  440. return 1; /* OpenBSD only supports ARMv7 CPUs that have NEON. */
  441. #elif defined(HAVE_ELF_AUX_INFO)
  442. unsigned long hasneon = 0;
  443. if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0)
  444. return 0;
  445. return ((hasneon & HWCAP_NEON) == HWCAP_NEON);
  446. #elif defined(__QNXNTO__)
  447. return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
  448. #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
  449. return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
  450. #elif defined(__LINUX__)
  451. return readProcAuxvForNeon();
  452. #elif defined(__ANDROID__)
  453. /* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
  454. {
  455. AndroidCpuFamily cpu_family = android_getCpuFamily();
  456. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  457. uint64_t cpu_features = android_getCpuFeatures();
  458. if ((cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) != 0) {
  459. return 1;
  460. }
  461. }
  462. return 0;
  463. }
  464. #elif defined(__RISCOS__)
  465. /* Use the VFPSupport_Features SWI to access the MVFR registers */
  466. {
  467. _kernel_swi_regs regs;
  468. regs.r[0] = 0;
  469. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  470. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  471. return 1;
  472. }
  473. }
  474. return 0;
  475. }
  476. #else
  477. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  478. return 0;
  479. #endif
  480. }
  481. static int
  482. CPU_readCPUCFG(void)
  483. {
  484. uint32_t cfg2 = 0;
  485. #if defined __loongarch__
  486. __asm__ volatile(
  487. "cpucfg %0, %1 \n\t"
  488. : "+&r"(cfg2)
  489. : "r"(CPU_CFG2)
  490. );
  491. #endif
  492. return cfg2;
  493. }
  494. #define CPU_haveLSX() (CPU_readCPUCFG() & CPU_CFG2_LSX)
  495. #define CPU_haveLASX() (CPU_readCPUCFG() & CPU_CFG2_LASX)
  496. #if defined(__e2k__)
  497. inline int
  498. CPU_have3DNow(void)
  499. {
  500. #if defined(__3dNOW__)
  501. return 1;
  502. #else
  503. return 0;
  504. #endif
  505. }
  506. #else
  507. static int
  508. CPU_have3DNow(void)
  509. {
  510. if (CPU_CPUIDMaxFunction > 0) { /* that is, do we have CPUID at all? */
  511. int a, b, c, d;
  512. cpuid(0x80000000, a, b, c, d);
  513. if (a >= 0x80000001) {
  514. cpuid(0x80000001, a, b, c, d);
  515. return (d & 0x80000000);
  516. }
  517. }
  518. return 0;
  519. }
  520. #endif
  521. #if defined(__e2k__)
  522. #define CPU_haveRDTSC() (0)
  523. #if defined(__MMX__)
  524. #define CPU_haveMMX() (1)
  525. #else
  526. #define CPU_haveMMX() (0)
  527. #endif
  528. #if defined(__SSE__)
  529. #define CPU_haveSSE() (1)
  530. #else
  531. #define CPU_haveSSE() (0)
  532. #endif
  533. #if defined(__SSE2__)
  534. #define CPU_haveSSE2() (1)
  535. #else
  536. #define CPU_haveSSE2() (0)
  537. #endif
  538. #if defined(__SSE3__)
  539. #define CPU_haveSSE3() (1)
  540. #else
  541. #define CPU_haveSSE3() (0)
  542. #endif
  543. #if defined(__SSE4_1__)
  544. #define CPU_haveSSE41() (1)
  545. #else
  546. #define CPU_haveSSE41() (0)
  547. #endif
  548. #if defined(__SSE4_2__)
  549. #define CPU_haveSSE42() (1)
  550. #else
  551. #define CPU_haveSSE42() (0)
  552. #endif
  553. #if defined(__AVX__)
  554. #define CPU_haveAVX() (1)
  555. #else
  556. #define CPU_haveAVX() (0)
  557. #endif
  558. #else
  559. #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
  560. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  561. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  562. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  563. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  564. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  565. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  566. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  567. #endif
  568. #if defined(__e2k__)
  569. inline int
  570. CPU_haveAVX2(void)
  571. {
  572. #if defined(__AVX2__)
  573. return 1;
  574. #else
  575. return 0;
  576. #endif
  577. }
  578. #else
  579. static int
  580. CPU_haveAVX2(void)
  581. {
  582. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  583. int a, b, c, d;
  584. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  585. cpuid(7, a, b, c, d);
  586. return (b & 0x00000020);
  587. }
  588. return 0;
  589. }
  590. #endif
  591. #if defined(__e2k__)
  592. inline int
  593. CPU_haveAVX512F(void)
  594. {
  595. return 0;
  596. }
  597. #else
  598. static int
  599. CPU_haveAVX512F(void)
  600. {
  601. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  602. int a, b, c, d;
  603. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  604. cpuid(7, a, b, c, d);
  605. return (b & 0x00010000);
  606. }
  607. return 0;
  608. }
  609. #endif
  610. static int SDL_CPUCount = 0;
  611. int
  612. SDL_GetCPUCount(void)
  613. {
  614. if (!SDL_CPUCount) {
  615. #ifndef SDL_CPUINFO_DISABLED
  616. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  617. if (SDL_CPUCount <= 0) {
  618. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  619. }
  620. #endif
  621. #ifdef HAVE_SYSCTLBYNAME
  622. if (SDL_CPUCount <= 0) {
  623. size_t size = sizeof(SDL_CPUCount);
  624. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  625. }
  626. #endif
  627. #ifdef __WIN32__
  628. if (SDL_CPUCount <= 0) {
  629. SYSTEM_INFO info;
  630. GetSystemInfo(&info);
  631. SDL_CPUCount = info.dwNumberOfProcessors;
  632. }
  633. #endif
  634. #ifdef __OS2__
  635. if (SDL_CPUCount <= 0) {
  636. DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
  637. &SDL_CPUCount, sizeof(SDL_CPUCount) );
  638. }
  639. #endif
  640. #endif
  641. /* There has to be at least 1, right? :) */
  642. if (SDL_CPUCount <= 0) {
  643. SDL_CPUCount = 1;
  644. }
  645. }
  646. return SDL_CPUCount;
  647. }
  648. #if defined(__e2k__)
  649. inline const char *
  650. SDL_GetCPUType(void)
  651. {
  652. static char SDL_CPUType[13];
  653. SDL_strlcpy(SDL_CPUType, "E2K MACHINE", sizeof(SDL_CPUType));
  654. return SDL_CPUType;
  655. }
  656. #else
  657. /* Oh, such a sweet sweet trick, just not very useful. :) */
  658. static const char *
  659. SDL_GetCPUType(void)
  660. {
  661. static char SDL_CPUType[13];
  662. if (!SDL_CPUType[0]) {
  663. int i = 0;
  664. CPU_calcCPUIDFeatures();
  665. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  666. int a, b, c, d;
  667. cpuid(0x00000000, a, b, c, d);
  668. (void) a;
  669. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  670. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  671. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  672. SDL_CPUType[i++] = (char)(b & 0xff);
  673. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  674. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  675. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  676. SDL_CPUType[i++] = (char)(d & 0xff);
  677. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  678. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  679. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  680. SDL_CPUType[i++] = (char)(c & 0xff);
  681. }
  682. if (!SDL_CPUType[0]) {
  683. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  684. }
  685. }
  686. return SDL_CPUType;
  687. }
  688. #endif
  689. #ifdef TEST_MAIN /* !!! FIXME: only used for test at the moment. */
  690. #if defined(__e2k__)
  691. inline const char *
  692. SDL_GetCPUName(void)
  693. {
  694. static char SDL_CPUName[48];
  695. SDL_strlcpy(SDL_CPUName, __builtin_cpu_name(), sizeof(SDL_CPUName));
  696. return SDL_CPUName;
  697. }
  698. #else
  699. static const char *
  700. SDL_GetCPUName(void)
  701. {
  702. static char SDL_CPUName[48];
  703. if (!SDL_CPUName[0]) {
  704. int i = 0;
  705. int a, b, c, d;
  706. CPU_calcCPUIDFeatures();
  707. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  708. cpuid(0x80000000, a, b, c, d);
  709. if (a >= 0x80000004) {
  710. cpuid(0x80000002, a, b, c, d);
  711. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  712. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  713. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  714. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  715. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  716. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  717. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  718. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  719. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  720. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  721. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  722. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  723. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  724. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  725. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  726. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  727. cpuid(0x80000003, a, b, c, d);
  728. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  729. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  730. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  731. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  732. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  733. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  734. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  735. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  736. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  737. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  738. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  739. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  740. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  741. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  742. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  743. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  744. cpuid(0x80000004, a, b, c, d);
  745. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  746. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  747. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  748. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  749. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  750. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  751. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  752. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  753. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  754. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  755. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  756. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  757. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  758. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  759. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  760. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  761. }
  762. }
  763. if (!SDL_CPUName[0]) {
  764. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  765. }
  766. }
  767. return SDL_CPUName;
  768. }
  769. #endif
  770. #endif
  771. int
  772. SDL_GetCPUCacheLineSize(void)
  773. {
  774. const char *cpuType = SDL_GetCPUType();
  775. int a, b, c, d;
  776. (void) a; (void) b; (void) c; (void) d;
  777. if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
  778. cpuid(0x00000001, a, b, c, d);
  779. return (((b >> 8) & 0xff) * 8);
  780. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  781. cpuid(0x80000005, a, b, c, d);
  782. return (c & 0xff);
  783. } else {
  784. /* Just make a guess here... */
  785. return SDL_CACHELINE_SIZE;
  786. }
  787. }
  788. static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
  789. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  790. static Uint32
  791. SDL_GetCPUFeatures(void)
  792. {
  793. if (SDL_CPUFeatures == 0xFFFFFFFF) {
  794. CPU_calcCPUIDFeatures();
  795. SDL_CPUFeatures = 0;
  796. SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
  797. if (CPU_haveRDTSC()) {
  798. SDL_CPUFeatures |= CPU_HAS_RDTSC;
  799. }
  800. if (CPU_haveAltiVec()) {
  801. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  802. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  803. }
  804. if (CPU_haveMMX()) {
  805. SDL_CPUFeatures |= CPU_HAS_MMX;
  806. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  807. }
  808. if (CPU_have3DNow()) {
  809. SDL_CPUFeatures |= CPU_HAS_3DNOW;
  810. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  811. }
  812. if (CPU_haveSSE()) {
  813. SDL_CPUFeatures |= CPU_HAS_SSE;
  814. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  815. }
  816. if (CPU_haveSSE2()) {
  817. SDL_CPUFeatures |= CPU_HAS_SSE2;
  818. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  819. }
  820. if (CPU_haveSSE3()) {
  821. SDL_CPUFeatures |= CPU_HAS_SSE3;
  822. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  823. }
  824. if (CPU_haveSSE41()) {
  825. SDL_CPUFeatures |= CPU_HAS_SSE41;
  826. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  827. }
  828. if (CPU_haveSSE42()) {
  829. SDL_CPUFeatures |= CPU_HAS_SSE42;
  830. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  831. }
  832. if (CPU_haveAVX()) {
  833. SDL_CPUFeatures |= CPU_HAS_AVX;
  834. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  835. }
  836. if (CPU_haveAVX2()) {
  837. SDL_CPUFeatures |= CPU_HAS_AVX2;
  838. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  839. }
  840. if (CPU_haveAVX512F()) {
  841. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  842. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  843. }
  844. if (CPU_haveARMSIMD()) {
  845. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  846. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  847. }
  848. if (CPU_haveNEON()) {
  849. SDL_CPUFeatures |= CPU_HAS_NEON;
  850. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  851. }
  852. if (CPU_haveLSX()) {
  853. SDL_CPUFeatures |= CPU_HAS_LSX;
  854. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  855. }
  856. if (CPU_haveLASX()) {
  857. SDL_CPUFeatures |= CPU_HAS_LASX;
  858. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  859. }
  860. }
  861. return SDL_CPUFeatures;
  862. }
  863. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
  864. SDL_bool SDL_HasRDTSC(void)
  865. {
  866. return CPU_FEATURE_AVAILABLE(CPU_HAS_RDTSC);
  867. }
  868. SDL_bool
  869. SDL_HasAltiVec(void)
  870. {
  871. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  872. }
  873. SDL_bool
  874. SDL_HasMMX(void)
  875. {
  876. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  877. }
  878. SDL_bool
  879. SDL_Has3DNow(void)
  880. {
  881. return CPU_FEATURE_AVAILABLE(CPU_HAS_3DNOW);
  882. }
  883. SDL_bool
  884. SDL_HasSSE(void)
  885. {
  886. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  887. }
  888. SDL_bool
  889. SDL_HasSSE2(void)
  890. {
  891. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  892. }
  893. SDL_bool
  894. SDL_HasSSE3(void)
  895. {
  896. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  897. }
  898. SDL_bool
  899. SDL_HasSSE41(void)
  900. {
  901. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  902. }
  903. SDL_bool
  904. SDL_HasSSE42(void)
  905. {
  906. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  907. }
  908. SDL_bool
  909. SDL_HasAVX(void)
  910. {
  911. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  912. }
  913. SDL_bool
  914. SDL_HasAVX2(void)
  915. {
  916. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  917. }
  918. SDL_bool
  919. SDL_HasAVX512F(void)
  920. {
  921. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  922. }
  923. SDL_bool
  924. SDL_HasARMSIMD(void)
  925. {
  926. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  927. }
  928. SDL_bool
  929. SDL_HasNEON(void)
  930. {
  931. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  932. }
  933. SDL_bool
  934. SDL_HasLSX(void)
  935. {
  936. return CPU_FEATURE_AVAILABLE(CPU_HAS_LSX);
  937. }
  938. SDL_bool
  939. SDL_HasLASX(void)
  940. {
  941. return CPU_FEATURE_AVAILABLE(CPU_HAS_LASX);
  942. }
  943. static int SDL_SystemRAM = 0;
  944. int
  945. SDL_GetSystemRAM(void)
  946. {
  947. if (!SDL_SystemRAM) {
  948. #ifndef SDL_CPUINFO_DISABLED
  949. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  950. if (SDL_SystemRAM <= 0) {
  951. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024*1024));
  952. }
  953. #endif
  954. #ifdef HAVE_SYSCTLBYNAME
  955. if (SDL_SystemRAM <= 0) {
  956. #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__DragonFly__)
  957. #ifdef HW_REALMEM
  958. int mib[2] = {CTL_HW, HW_REALMEM};
  959. #else
  960. /* might only report up to 2 GiB */
  961. int mib[2] = {CTL_HW, HW_PHYSMEM};
  962. #endif /* HW_REALMEM */
  963. #else
  964. int mib[2] = {CTL_HW, HW_MEMSIZE};
  965. #endif /* __FreeBSD__ || __FreeBSD_kernel__ */
  966. Uint64 memsize = 0;
  967. size_t len = sizeof(memsize);
  968. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  969. SDL_SystemRAM = (int)(memsize / (1024*1024));
  970. }
  971. }
  972. #endif
  973. #ifdef __WIN32__
  974. if (SDL_SystemRAM <= 0) {
  975. MEMORYSTATUSEX stat;
  976. stat.dwLength = sizeof(stat);
  977. if (GlobalMemoryStatusEx(&stat)) {
  978. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  979. }
  980. }
  981. #endif
  982. #ifdef __OS2__
  983. if (SDL_SystemRAM <= 0) {
  984. Uint32 sysram = 0;
  985. DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
  986. SDL_SystemRAM = (int) (sysram / 0x100000U);
  987. }
  988. #endif
  989. #ifdef __RISCOS__
  990. if (SDL_SystemRAM <= 0) {
  991. _kernel_swi_regs regs;
  992. regs.r[0] = 0x108;
  993. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  994. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  995. }
  996. }
  997. #endif
  998. #ifdef __VITA__
  999. if (SDL_SystemRAM <= 0) {
  1000. /* Vita has 512MiB on SoC, that's split into 256MiB(+109MiB in extended memory mode) for app
  1001. +26MiB of physically continuous memory, +112MiB of CDRAM(VRAM) + system reserved memory. */
  1002. SDL_SystemRAM = 536870912;
  1003. }
  1004. #endif
  1005. #endif
  1006. }
  1007. return SDL_SystemRAM;
  1008. }
  1009. size_t
  1010. SDL_SIMDGetAlignment(void)
  1011. {
  1012. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  1013. SDL_GetCPUFeatures(); /* make sure this has been calculated */
  1014. }
  1015. SDL_assert(SDL_SIMDAlignment != 0);
  1016. return SDL_SIMDAlignment;
  1017. }
  1018. void *
  1019. SDL_SIMDAlloc(const size_t len)
  1020. {
  1021. const size_t alignment = SDL_SIMDGetAlignment();
  1022. const size_t padding = (alignment - (len % alignment)) % alignment;
  1023. Uint8 *retval = NULL;
  1024. Uint8 *ptr;
  1025. size_t to_allocate;
  1026. /* alignment + padding + sizeof (void *) is bounded (a few hundred
  1027. * bytes max), so no need to check for overflow within that argument */
  1028. if (SDL_size_add_overflow(len, alignment + padding + sizeof (void *), &to_allocate)) {
  1029. return NULL;
  1030. }
  1031. ptr = (Uint8 *) SDL_malloc(to_allocate);
  1032. if (ptr) {
  1033. /* store the actual allocated pointer right before our aligned pointer. */
  1034. retval = ptr + sizeof (void *);
  1035. retval += alignment - (((size_t) retval) % alignment);
  1036. *(((void **) retval) - 1) = ptr;
  1037. }
  1038. return retval;
  1039. }
  1040. void *
  1041. SDL_SIMDRealloc(void *mem, const size_t len)
  1042. {
  1043. const size_t alignment = SDL_SIMDGetAlignment();
  1044. const size_t padding = (alignment - (len % alignment)) % alignment;
  1045. Uint8 *retval = (Uint8*) mem;
  1046. void *oldmem = mem;
  1047. size_t memdiff = 0, ptrdiff;
  1048. Uint8 *ptr;
  1049. size_t to_allocate;
  1050. /* alignment + padding + sizeof (void *) is bounded (a few hundred
  1051. * bytes max), so no need to check for overflow within that argument */
  1052. if (SDL_size_add_overflow(len, alignment + padding + sizeof (void *), &to_allocate)) {
  1053. return NULL;
  1054. }
  1055. if (mem) {
  1056. void **realptr = (void **) mem;
  1057. realptr--;
  1058. mem = *(((void **) mem) - 1);
  1059. /* Check the delta between the real pointer and user pointer */
  1060. memdiff = ((size_t) oldmem) - ((size_t) mem);
  1061. }
  1062. ptr = (Uint8 *) SDL_realloc(mem, to_allocate);
  1063. if (ptr == NULL) {
  1064. return NULL; /* Out of memory, bail! */
  1065. }
  1066. /* Store the actual allocated pointer right before our aligned pointer. */
  1067. retval = ptr + sizeof (void *);
  1068. retval += alignment - (((size_t) retval) % alignment);
  1069. /* Make sure the delta is the same! */
  1070. if (mem) {
  1071. ptrdiff = ((size_t) retval) - ((size_t) ptr);
  1072. if (memdiff != ptrdiff) { /* Delta has changed, copy to new offset! */
  1073. oldmem = (void*) (((uintptr_t) ptr) + memdiff);
  1074. /* Even though the data past the old `len` is undefined, this is the
  1075. * only length value we have, and it guarantees that we copy all the
  1076. * previous memory anyhow.
  1077. */
  1078. SDL_memmove(retval, oldmem, len);
  1079. }
  1080. }
  1081. /* Actually store the allocated pointer, finally. */
  1082. *(((void **) retval) - 1) = ptr;
  1083. return retval;
  1084. }
  1085. void
  1086. SDL_SIMDFree(void *ptr)
  1087. {
  1088. if (ptr) {
  1089. void **realptr = (void **) ptr;
  1090. realptr--;
  1091. SDL_free(*(((void **) ptr) - 1));
  1092. }
  1093. }
  1094. #ifdef TEST_MAIN
  1095. #include <stdio.h>
  1096. int
  1097. main()
  1098. {
  1099. printf("CPU count: %d\n", SDL_GetCPUCount());
  1100. printf("CPU type: %s\n", SDL_GetCPUType());
  1101. printf("CPU name: %s\n", SDL_GetCPUName());
  1102. printf("CacheLine size: %d\n", SDL_GetCPUCacheLineSize());
  1103. printf("RDTSC: %d\n", SDL_HasRDTSC());
  1104. printf("Altivec: %d\n", SDL_HasAltiVec());
  1105. printf("MMX: %d\n", SDL_HasMMX());
  1106. printf("3DNow: %d\n", SDL_Has3DNow());
  1107. printf("SSE: %d\n", SDL_HasSSE());
  1108. printf("SSE2: %d\n", SDL_HasSSE2());
  1109. printf("SSE3: %d\n", SDL_HasSSE3());
  1110. printf("SSE4.1: %d\n", SDL_HasSSE41());
  1111. printf("SSE4.2: %d\n", SDL_HasSSE42());
  1112. printf("AVX: %d\n", SDL_HasAVX());
  1113. printf("AVX2: %d\n", SDL_HasAVX2());
  1114. printf("AVX-512F: %d\n", SDL_HasAVX512F());
  1115. printf("ARM SIMD: %d\n", SDL_HasARMSIMD());
  1116. printf("NEON: %d\n", SDL_HasNEON());
  1117. printf("LSX: %d\n", SDL_HasLSX());
  1118. printf("LASX: %d\n", SDL_HasLASX());
  1119. printf("RAM: %d MB\n", SDL_GetSystemRAM());
  1120. return 0;
  1121. }
  1122. #endif /* TEST_MAIN */
  1123. /* vi: set ts=4 sw=4 expandtab: */