SDL_cpuinfo.c 37 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2024 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #include "SDL_internal.h"
  19. #include "SDL_cpuinfo_c.h"
  20. #if defined(SDL_PLATFORM_WINDOWS)
  21. #include "../core/windows/SDL_windows.h"
  22. #endif
  23. // CPU feature detection for SDL
  24. #ifdef HAVE_SYSCONF
  25. #include <unistd.h>
  26. #endif
  27. #ifdef HAVE_SYSCTLBYNAME
  28. #include <sys/types.h>
  29. #include <sys/sysctl.h>
  30. #endif
  31. #if defined(SDL_PLATFORM_MACOS) && (defined(__ppc__) || defined(__ppc64__))
  32. #include <sys/sysctl.h> // For AltiVec check
  33. #elif defined(SDL_PLATFORM_OPENBSD) && defined(__powerpc__)
  34. #include <sys/types.h>
  35. #include <sys/sysctl.h> // For AltiVec check
  36. #include <machine/cpu.h>
  37. #elif defined(SDL_PLATFORM_FREEBSD) && defined(__powerpc__)
  38. #include <machine/cpu.h>
  39. #include <sys/auxv.h>
  40. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  41. #include <signal.h>
  42. #include <setjmp.h>
  43. #endif
  44. #if (defined(SDL_PLATFORM_LINUX) || defined(SDL_PLATFORM_ANDROID)) && defined(__arm__)
  45. #include <unistd.h>
  46. #include <sys/types.h>
  47. #include <sys/stat.h>
  48. #include <fcntl.h>
  49. #include <elf.h>
  50. // #include <asm/hwcap.h>
  51. #ifndef AT_HWCAP
  52. #define AT_HWCAP 16
  53. #endif
  54. #ifndef AT_PLATFORM
  55. #define AT_PLATFORM 15
  56. #endif
  57. #ifndef HWCAP_NEON
  58. #define HWCAP_NEON (1 << 12)
  59. #endif
  60. #endif
  61. #if defined (SDL_PLATFORM_FREEBSD)
  62. #include <sys/param.h>
  63. #endif
  64. #if defined(SDL_PLATFORM_ANDROID) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  65. #include <cpu-features.h>
  66. #endif
  67. #if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
  68. #include <sys/auxv.h>
  69. #endif
  70. #ifdef SDL_PLATFORM_RISCOS
  71. #include <kernel.h>
  72. #include <swis.h>
  73. #endif
  74. #ifdef SDL_PLATFORM_PS2
  75. #include <kernel.h>
  76. #endif
  77. #ifdef SDL_PLATFORM_HAIKU
  78. #include <kernel/OS.h>
  79. #endif
  80. #define CPU_HAS_ALTIVEC (1 << 0)
  81. #define CPU_HAS_MMX (1 << 1)
  82. #define CPU_HAS_SSE (1 << 2)
  83. #define CPU_HAS_SSE2 (1 << 3)
  84. #define CPU_HAS_SSE3 (1 << 4)
  85. #define CPU_HAS_SSE41 (1 << 5)
  86. #define CPU_HAS_SSE42 (1 << 6)
  87. #define CPU_HAS_AVX (1 << 7)
  88. #define CPU_HAS_AVX2 (1 << 8)
  89. #define CPU_HAS_NEON (1 << 9)
  90. #define CPU_HAS_AVX512F (1 << 10)
  91. #define CPU_HAS_ARM_SIMD (1 << 11)
  92. #define CPU_HAS_LSX (1 << 12)
  93. #define CPU_HAS_LASX (1 << 13)
  94. #define CPU_CFG2 0x2
  95. #define CPU_CFG2_LSX (1 << 6)
  96. #define CPU_CFG2_LASX (1 << 7)
  97. #if defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP) && !defined(SDL_PLATFORM_MACOS) && !defined(SDL_PLATFORM_OPENBSD) && !defined(SDL_PLATFORM_FREEBSD)
  98. /* This is the brute force way of detecting instruction sets...
  99. the idea is borrowed from the libmpeg2 library - thanks!
  100. */
  101. static jmp_buf jmpbuf;
  102. static void illegal_instruction(int sig)
  103. {
  104. longjmp(jmpbuf, 1);
  105. }
  106. #endif // HAVE_SETJMP
  107. static int CPU_haveCPUID(void)
  108. {
  109. int has_CPUID = 0;
  110. /* *INDENT-OFF* */ // clang-format off
  111. #ifndef SDL_PLATFORM_EMSCRIPTEN
  112. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  113. __asm__ (
  114. " pushfl # Get original EFLAGS \n"
  115. " popl %%eax \n"
  116. " movl %%eax,%%ecx \n"
  117. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  118. " pushl %%eax # Save new EFLAGS value on stack \n"
  119. " popfl # Replace current EFLAGS value \n"
  120. " pushfl # Get new EFLAGS \n"
  121. " popl %%eax # Store new EFLAGS in EAX \n"
  122. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  123. " jz 1f # Processor=80486 \n"
  124. " movl $1,%0 # We have CPUID support \n"
  125. "1: \n"
  126. : "=m" (has_CPUID)
  127. :
  128. : "%eax", "%ecx"
  129. );
  130. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  131. /* Technically, if this is being compiled under __x86_64__ then it has
  132. CPUid by definition. But it's nice to be able to prove it. :) */
  133. __asm__ (
  134. " pushfq # Get original EFLAGS \n"
  135. " popq %%rax \n"
  136. " movq %%rax,%%rcx \n"
  137. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  138. " pushq %%rax # Save new EFLAGS value on stack \n"
  139. " popfq # Replace current EFLAGS value \n"
  140. " pushfq # Get new EFLAGS \n"
  141. " popq %%rax # Store new EFLAGS in EAX \n"
  142. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  143. " jz 1f # Processor=80486 \n"
  144. " movl $1,%0 # We have CPUID support \n"
  145. "1: \n"
  146. : "=m" (has_CPUID)
  147. :
  148. : "%rax", "%rcx"
  149. );
  150. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  151. __asm {
  152. pushfd ; Get original EFLAGS
  153. pop eax
  154. mov ecx, eax
  155. xor eax, 200000h ; Flip ID bit in EFLAGS
  156. push eax ; Save new EFLAGS value on stack
  157. popfd ; Replace current EFLAGS value
  158. pushfd ; Get new EFLAGS
  159. pop eax ; Store new EFLAGS in EAX
  160. xor eax, ecx ; Can not toggle ID bit,
  161. jz done ; Processor=80486
  162. mov has_CPUID,1 ; We have CPUID support
  163. done:
  164. }
  165. #elif defined(_MSC_VER) && defined(_M_X64)
  166. has_CPUID = 1;
  167. #elif defined(__sun) && defined(__i386)
  168. __asm (
  169. " pushfl \n"
  170. " popl %eax \n"
  171. " movl %eax,%ecx \n"
  172. " xorl $0x200000,%eax \n"
  173. " pushl %eax \n"
  174. " popfl \n"
  175. " pushfl \n"
  176. " popl %eax \n"
  177. " xorl %ecx,%eax \n"
  178. " jz 1f \n"
  179. " movl $1,-8(%ebp) \n"
  180. "1: \n"
  181. );
  182. #elif defined(__sun) && defined(__amd64)
  183. __asm (
  184. " pushfq \n"
  185. " popq %rax \n"
  186. " movq %rax,%rcx \n"
  187. " xorl $0x200000,%eax \n"
  188. " pushq %rax \n"
  189. " popfq \n"
  190. " pushfq \n"
  191. " popq %rax \n"
  192. " xorl %ecx,%eax \n"
  193. " jz 1f \n"
  194. " movl $1,-8(%rbp) \n"
  195. "1: \n"
  196. );
  197. #endif
  198. #endif // !SDL_PLATFORM_EMSCRIPTEN
  199. /* *INDENT-ON* */ // clang-format on
  200. return has_CPUID;
  201. }
  202. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  203. #define cpuid(func, a, b, c, d) \
  204. __asm__ __volatile__( \
  205. " pushl %%ebx \n" \
  206. " xorl %%ecx,%%ecx \n" \
  207. " cpuid \n" \
  208. " movl %%ebx, %%esi \n" \
  209. " popl %%ebx \n" \
  210. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  211. : "a"(func))
  212. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  213. #define cpuid(func, a, b, c, d) \
  214. __asm__ __volatile__( \
  215. " pushq %%rbx \n" \
  216. " xorq %%rcx,%%rcx \n" \
  217. " cpuid \n" \
  218. " movq %%rbx, %%rsi \n" \
  219. " popq %%rbx \n" \
  220. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  221. : "a"(func))
  222. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  223. #define cpuid(func, a, b, c, d) \
  224. __asm { \
  225. __asm mov eax, func \
  226. __asm xor ecx, ecx \
  227. __asm cpuid \
  228. __asm mov a, eax \
  229. __asm mov b, ebx \
  230. __asm mov c, ecx \
  231. __asm mov d, edx \
  232. }
  233. #elif (defined(_MSC_VER) && defined(_M_X64))
  234. // Use __cpuidex instead of __cpuid because ICL does not clear ecx register
  235. #define cpuid(func, a, b, c, d) \
  236. { \
  237. int CPUInfo[4]; \
  238. __cpuidex(CPUInfo, func, 0); \
  239. a = CPUInfo[0]; \
  240. b = CPUInfo[1]; \
  241. c = CPUInfo[2]; \
  242. d = CPUInfo[3]; \
  243. }
  244. #else
  245. #define cpuid(func, a, b, c, d) \
  246. do { \
  247. a = b = c = d = 0; \
  248. (void)a; \
  249. (void)b; \
  250. (void)c; \
  251. (void)d; \
  252. } while (0)
  253. #endif
  254. static int CPU_CPUIDFeatures[4];
  255. static int CPU_CPUIDMaxFunction = 0;
  256. static bool CPU_OSSavesYMM = false;
  257. static bool CPU_OSSavesZMM = false;
  258. static void CPU_calcCPUIDFeatures(void)
  259. {
  260. static bool checked = false;
  261. if (!checked) {
  262. checked = true;
  263. if (CPU_haveCPUID()) {
  264. int a, b, c, d;
  265. cpuid(0, a, b, c, d);
  266. CPU_CPUIDMaxFunction = a;
  267. if (CPU_CPUIDMaxFunction >= 1) {
  268. cpuid(1, a, b, c, d);
  269. CPU_CPUIDFeatures[0] = a;
  270. CPU_CPUIDFeatures[1] = b;
  271. CPU_CPUIDFeatures[2] = c;
  272. CPU_CPUIDFeatures[3] = d;
  273. // Check to make sure we can call xgetbv
  274. if (c & 0x08000000) {
  275. // Call xgetbv to see if YMM (etc) register state is saved
  276. #if (defined(__GNUC__) || defined(__llvm__)) && (defined(__i386__) || defined(__x86_64__))
  277. __asm__(".byte 0x0f, 0x01, 0xd0"
  278. : "=a"(a)
  279. : "c"(0)
  280. : "%edx");
  281. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) // VS2010 SP1
  282. a = (int)_xgetbv(0);
  283. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  284. __asm
  285. {
  286. xor ecx, ecx
  287. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  288. mov a, eax
  289. }
  290. #endif
  291. CPU_OSSavesYMM = ((a & 6) == 6) ? true : false;
  292. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? true : false;
  293. }
  294. }
  295. }
  296. }
  297. }
  298. static int CPU_haveAltiVec(void)
  299. {
  300. volatile int altivec = 0;
  301. #ifndef SDL_CPUINFO_DISABLED
  302. #if (defined(SDL_PLATFORM_MACOS) && (defined(__ppc__) || defined(__ppc64__))) || (defined(SDL_PLATFORM_OPENBSD) && defined(__powerpc__))
  303. #ifdef SDL_PLATFORM_OPENBSD
  304. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  305. #else
  306. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  307. #endif
  308. int hasVectorUnit = 0;
  309. size_t length = sizeof(hasVectorUnit);
  310. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  311. if (0 == error) {
  312. altivec = (hasVectorUnit != 0);
  313. }
  314. #elif defined(SDL_PLATFORM_FREEBSD) && defined(__powerpc__)
  315. unsigned long cpufeatures = 0;
  316. elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures));
  317. altivec = cpufeatures & PPC_FEATURE_HAS_ALTIVEC;
  318. return altivec;
  319. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  320. void (*handler)(int sig);
  321. handler = signal(SIGILL, illegal_instruction);
  322. if (setjmp(jmpbuf) == 0) {
  323. asm volatile("mtspr 256, %0\n\t"
  324. "vand %%v0, %%v0, %%v0" ::"r"(-1));
  325. altivec = 1;
  326. }
  327. signal(SIGILL, handler);
  328. #endif
  329. #endif
  330. return altivec;
  331. }
  332. #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) || defined(__aarch64__)
  333. static int CPU_haveARMSIMD(void)
  334. {
  335. return 1;
  336. }
  337. #elif !defined(__arm__)
  338. static int CPU_haveARMSIMD(void)
  339. {
  340. return 0;
  341. }
  342. #elif defined(SDL_PLATFORM_LINUX)
  343. static int CPU_haveARMSIMD(void)
  344. {
  345. int arm_simd = 0;
  346. int fd;
  347. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  348. if (fd >= 0) {
  349. Elf32_auxv_t aux;
  350. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  351. if (aux.a_type == AT_PLATFORM) {
  352. const char *plat = (const char *)aux.a_un.a_val;
  353. if (plat) {
  354. arm_simd = SDL_strncmp(plat, "v6l", 3) == 0 ||
  355. SDL_strncmp(plat, "v7l", 3) == 0;
  356. }
  357. }
  358. }
  359. close(fd);
  360. }
  361. return arm_simd;
  362. }
  363. #elif defined(SDL_PLATFORM_RISCOS)
  364. static int CPU_haveARMSIMD(void)
  365. {
  366. _kernel_swi_regs regs;
  367. regs.r[0] = 0;
  368. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  369. return 0;
  370. }
  371. if (!(regs.r[0] & (1 << 31))) {
  372. return 0;
  373. }
  374. regs.r[0] = 34;
  375. regs.r[1] = 29;
  376. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  377. return 0;
  378. }
  379. return regs.r[0];
  380. }
  381. #else
  382. static int CPU_haveARMSIMD(void)
  383. {
  384. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  385. return 0;
  386. }
  387. #endif
  388. #if defined(SDL_PLATFORM_LINUX) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  389. static int readProcAuxvForNeon(void)
  390. {
  391. int neon = 0;
  392. int fd;
  393. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  394. if (fd >= 0) {
  395. Elf32_auxv_t aux;
  396. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  397. if (aux.a_type == AT_HWCAP) {
  398. neon = (aux.a_un.a_val & HWCAP_NEON) == HWCAP_NEON;
  399. break;
  400. }
  401. }
  402. close(fd);
  403. }
  404. return neon;
  405. }
  406. #endif
  407. static int CPU_haveNEON(void)
  408. {
  409. /* The way you detect NEON is a privileged instruction on ARM, so you have
  410. query the OS kernel in a platform-specific way. :/ */
  411. #if defined(SDL_PLATFORM_WINDOWS) && (defined(_M_ARM) || defined(_M_ARM64))
  412. // Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first.
  413. // Seems to have been removed
  414. #ifndef PF_ARM_NEON_INSTRUCTIONS_AVAILABLE
  415. #define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  416. #endif
  417. // All WinRT ARM devices are required to support NEON, but just in case.
  418. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  419. #elif (defined(__ARM_ARCH) && (__ARM_ARCH >= 8)) || defined(__aarch64__)
  420. return 1; // ARMv8 always has non-optional NEON support.
  421. #elif defined(SDL_PLATFORM_VITA)
  422. return 1;
  423. #elif defined(SDL_PLATFORM_3DS)
  424. return 0;
  425. #elif defined(SDL_PLATFORM_APPLE) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  426. // (note that sysctlbyname("hw.optional.neon") doesn't work!)
  427. return 1; // all Apple ARMv7 chips and later have NEON.
  428. #elif defined(SDL_PLATFORM_APPLE)
  429. return 0; // assume anything else from Apple doesn't have NEON.
  430. #elif !defined(__arm__)
  431. return 0; // not an ARM CPU at all.
  432. #elif defined(SDL_PLATFORM_OPENBSD)
  433. return 1; // OpenBSD only supports ARMv7 CPUs that have NEON.
  434. #elif defined(HAVE_ELF_AUX_INFO)
  435. unsigned long hasneon = 0;
  436. if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0) {
  437. return 0;
  438. }
  439. return (hasneon & HWCAP_NEON) == HWCAP_NEON;
  440. #elif (defined(SDL_PLATFORM_LINUX) || defined(SDL_PLATFORM_ANDROID)) && defined(HAVE_GETAUXVAL)
  441. return (getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON;
  442. #elif defined(SDL_PLATFORM_LINUX)
  443. return readProcAuxvForNeon();
  444. #elif defined(SDL_PLATFORM_ANDROID)
  445. // Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo
  446. {
  447. AndroidCpuFamily cpu_family = android_getCpuFamily();
  448. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  449. uint64_t cpu_features = android_getCpuFeatures();
  450. if (cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) {
  451. return 1;
  452. }
  453. }
  454. return 0;
  455. }
  456. #elif defined(SDL_PLATFORM_RISCOS)
  457. // Use the VFPSupport_Features SWI to access the MVFR registers
  458. {
  459. _kernel_swi_regs regs;
  460. regs.r[0] = 0;
  461. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  462. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  463. return 1;
  464. }
  465. }
  466. return 0;
  467. }
  468. #elif defined(SDL_PLATFORM_EMSCRIPTEN)
  469. return 0;
  470. #else
  471. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  472. return 0;
  473. #endif
  474. }
  475. static int CPU_readCPUCFG(void)
  476. {
  477. uint32_t cfg2 = 0;
  478. #if defined __loongarch__
  479. __asm__ volatile(
  480. "cpucfg %0, %1 \n\t"
  481. : "+&r"(cfg2)
  482. : "r"(CPU_CFG2));
  483. #endif
  484. return cfg2;
  485. }
  486. #define CPU_haveLSX() (CPU_readCPUCFG() & CPU_CFG2_LSX)
  487. #define CPU_haveLASX() (CPU_readCPUCFG() & CPU_CFG2_LASX)
  488. #ifdef __e2k__
  489. #ifdef __MMX__
  490. #define CPU_haveMMX() (1)
  491. #else
  492. #define CPU_haveMMX() (0)
  493. #endif
  494. #ifdef __SSE__
  495. #define CPU_haveSSE() (1)
  496. #else
  497. #define CPU_haveSSE() (0)
  498. #endif
  499. #ifdef __SSE2__
  500. #define CPU_haveSSE2() (1)
  501. #else
  502. #define CPU_haveSSE2() (0)
  503. #endif
  504. #ifdef __SSE3__
  505. #define CPU_haveSSE3() (1)
  506. #else
  507. #define CPU_haveSSE3() (0)
  508. #endif
  509. #ifdef __SSE4_1__
  510. #define CPU_haveSSE41() (1)
  511. #else
  512. #define CPU_haveSSE41() (0)
  513. #endif
  514. #ifdef __SSE4_2__
  515. #define CPU_haveSSE42() (1)
  516. #else
  517. #define CPU_haveSSE42() (0)
  518. #endif
  519. #ifdef __AVX__
  520. #define CPU_haveAVX() (1)
  521. #else
  522. #define CPU_haveAVX() (0)
  523. #endif
  524. #else
  525. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  526. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  527. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  528. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  529. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  530. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  531. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  532. #endif
  533. #ifdef __e2k__
  534. inline int
  535. CPU_haveAVX2(void)
  536. {
  537. #ifdef __AVX2__
  538. return 1;
  539. #else
  540. return 0;
  541. #endif
  542. }
  543. #else
  544. static int CPU_haveAVX2(void)
  545. {
  546. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  547. int a, b, c, d;
  548. (void)a;
  549. (void)b;
  550. (void)c;
  551. (void)d; // compiler warnings...
  552. cpuid(7, a, b, c, d);
  553. return b & 0x00000020;
  554. }
  555. return 0;
  556. }
  557. #endif
  558. #ifdef __e2k__
  559. inline int
  560. CPU_haveAVX512F(void)
  561. {
  562. return 0;
  563. }
  564. #else
  565. static int CPU_haveAVX512F(void)
  566. {
  567. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  568. int a, b, c, d;
  569. (void)a;
  570. (void)b;
  571. (void)c;
  572. (void)d; // compiler warnings...
  573. cpuid(7, a, b, c, d);
  574. return b & 0x00010000;
  575. }
  576. return 0;
  577. }
  578. #endif
  579. static int SDL_NumLogicalCPUCores = 0;
  580. int SDL_GetNumLogicalCPUCores(void)
  581. {
  582. if (!SDL_NumLogicalCPUCores) {
  583. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  584. if (SDL_NumLogicalCPUCores <= 0) {
  585. SDL_NumLogicalCPUCores = (int)sysconf(_SC_NPROCESSORS_ONLN);
  586. }
  587. #endif
  588. #ifdef HAVE_SYSCTLBYNAME
  589. if (SDL_NumLogicalCPUCores <= 0) {
  590. size_t size = sizeof(SDL_NumLogicalCPUCores);
  591. sysctlbyname("hw.ncpu", &SDL_NumLogicalCPUCores, &size, NULL, 0);
  592. }
  593. #endif
  594. #if defined(SDL_PLATFORM_WINDOWS)
  595. if (SDL_NumLogicalCPUCores <= 0) {
  596. SYSTEM_INFO info;
  597. GetSystemInfo(&info);
  598. SDL_NumLogicalCPUCores = info.dwNumberOfProcessors;
  599. }
  600. #endif
  601. // There has to be at least 1, right? :)
  602. if (SDL_NumLogicalCPUCores <= 0) {
  603. SDL_NumLogicalCPUCores = 1;
  604. }
  605. }
  606. return SDL_NumLogicalCPUCores;
  607. }
  608. #ifdef __e2k__
  609. inline const char *
  610. SDL_GetCPUType(void)
  611. {
  612. static char SDL_CPUType[13];
  613. SDL_strlcpy(SDL_CPUType, "E2K MACHINE", sizeof(SDL_CPUType));
  614. return SDL_CPUType;
  615. }
  616. #else
  617. // Oh, such a sweet sweet trick, just not very useful. :)
  618. static const char *SDL_GetCPUType(void)
  619. {
  620. static char SDL_CPUType[13];
  621. if (!SDL_CPUType[0]) {
  622. int i = 0;
  623. CPU_calcCPUIDFeatures();
  624. if (CPU_CPUIDMaxFunction > 0) { // do we have CPUID at all?
  625. int a, b, c, d;
  626. cpuid(0x00000000, a, b, c, d);
  627. (void)a;
  628. SDL_CPUType[i++] = (char)(b & 0xff);
  629. b >>= 8;
  630. SDL_CPUType[i++] = (char)(b & 0xff);
  631. b >>= 8;
  632. SDL_CPUType[i++] = (char)(b & 0xff);
  633. b >>= 8;
  634. SDL_CPUType[i++] = (char)(b & 0xff);
  635. SDL_CPUType[i++] = (char)(d & 0xff);
  636. d >>= 8;
  637. SDL_CPUType[i++] = (char)(d & 0xff);
  638. d >>= 8;
  639. SDL_CPUType[i++] = (char)(d & 0xff);
  640. d >>= 8;
  641. SDL_CPUType[i++] = (char)(d & 0xff);
  642. SDL_CPUType[i++] = (char)(c & 0xff);
  643. c >>= 8;
  644. SDL_CPUType[i++] = (char)(c & 0xff);
  645. c >>= 8;
  646. SDL_CPUType[i++] = (char)(c & 0xff);
  647. c >>= 8;
  648. SDL_CPUType[i++] = (char)(c & 0xff);
  649. }
  650. if (!SDL_CPUType[0]) {
  651. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  652. }
  653. }
  654. return SDL_CPUType;
  655. }
  656. #endif
  657. #if 0
  658. !!! FIXME: Not used at the moment. */
  659. #ifdef __e2k__
  660. inline const char *
  661. SDL_GetCPUName(void)
  662. {
  663. static char SDL_CPUName[48];
  664. SDL_strlcpy(SDL_CPUName, __builtin_cpu_name(), sizeof(SDL_CPUName));
  665. return SDL_CPUName;
  666. }
  667. #else
  668. static const char *SDL_GetCPUName(void)
  669. {
  670. static char SDL_CPUName[48];
  671. if (!SDL_CPUName[0]) {
  672. int i = 0;
  673. int a, b, c, d;
  674. CPU_calcCPUIDFeatures();
  675. if (CPU_CPUIDMaxFunction > 0) { // do we have CPUID at all?
  676. cpuid(0x80000000, a, b, c, d);
  677. if (a >= 0x80000004) {
  678. cpuid(0x80000002, a, b, c, d);
  679. SDL_CPUName[i++] = (char)(a & 0xff);
  680. a >>= 8;
  681. SDL_CPUName[i++] = (char)(a & 0xff);
  682. a >>= 8;
  683. SDL_CPUName[i++] = (char)(a & 0xff);
  684. a >>= 8;
  685. SDL_CPUName[i++] = (char)(a & 0xff);
  686. a >>= 8;
  687. SDL_CPUName[i++] = (char)(b & 0xff);
  688. b >>= 8;
  689. SDL_CPUName[i++] = (char)(b & 0xff);
  690. b >>= 8;
  691. SDL_CPUName[i++] = (char)(b & 0xff);
  692. b >>= 8;
  693. SDL_CPUName[i++] = (char)(b & 0xff);
  694. b >>= 8;
  695. SDL_CPUName[i++] = (char)(c & 0xff);
  696. c >>= 8;
  697. SDL_CPUName[i++] = (char)(c & 0xff);
  698. c >>= 8;
  699. SDL_CPUName[i++] = (char)(c & 0xff);
  700. c >>= 8;
  701. SDL_CPUName[i++] = (char)(c & 0xff);
  702. c >>= 8;
  703. SDL_CPUName[i++] = (char)(d & 0xff);
  704. d >>= 8;
  705. SDL_CPUName[i++] = (char)(d & 0xff);
  706. d >>= 8;
  707. SDL_CPUName[i++] = (char)(d & 0xff);
  708. d >>= 8;
  709. SDL_CPUName[i++] = (char)(d & 0xff);
  710. d >>= 8;
  711. cpuid(0x80000003, a, b, c, d);
  712. SDL_CPUName[i++] = (char)(a & 0xff);
  713. a >>= 8;
  714. SDL_CPUName[i++] = (char)(a & 0xff);
  715. a >>= 8;
  716. SDL_CPUName[i++] = (char)(a & 0xff);
  717. a >>= 8;
  718. SDL_CPUName[i++] = (char)(a & 0xff);
  719. a >>= 8;
  720. SDL_CPUName[i++] = (char)(b & 0xff);
  721. b >>= 8;
  722. SDL_CPUName[i++] = (char)(b & 0xff);
  723. b >>= 8;
  724. SDL_CPUName[i++] = (char)(b & 0xff);
  725. b >>= 8;
  726. SDL_CPUName[i++] = (char)(b & 0xff);
  727. b >>= 8;
  728. SDL_CPUName[i++] = (char)(c & 0xff);
  729. c >>= 8;
  730. SDL_CPUName[i++] = (char)(c & 0xff);
  731. c >>= 8;
  732. SDL_CPUName[i++] = (char)(c & 0xff);
  733. c >>= 8;
  734. SDL_CPUName[i++] = (char)(c & 0xff);
  735. c >>= 8;
  736. SDL_CPUName[i++] = (char)(d & 0xff);
  737. d >>= 8;
  738. SDL_CPUName[i++] = (char)(d & 0xff);
  739. d >>= 8;
  740. SDL_CPUName[i++] = (char)(d & 0xff);
  741. d >>= 8;
  742. SDL_CPUName[i++] = (char)(d & 0xff);
  743. d >>= 8;
  744. cpuid(0x80000004, a, b, c, d);
  745. SDL_CPUName[i++] = (char)(a & 0xff);
  746. a >>= 8;
  747. SDL_CPUName[i++] = (char)(a & 0xff);
  748. a >>= 8;
  749. SDL_CPUName[i++] = (char)(a & 0xff);
  750. a >>= 8;
  751. SDL_CPUName[i++] = (char)(a & 0xff);
  752. a >>= 8;
  753. SDL_CPUName[i++] = (char)(b & 0xff);
  754. b >>= 8;
  755. SDL_CPUName[i++] = (char)(b & 0xff);
  756. b >>= 8;
  757. SDL_CPUName[i++] = (char)(b & 0xff);
  758. b >>= 8;
  759. SDL_CPUName[i++] = (char)(b & 0xff);
  760. b >>= 8;
  761. SDL_CPUName[i++] = (char)(c & 0xff);
  762. c >>= 8;
  763. SDL_CPUName[i++] = (char)(c & 0xff);
  764. c >>= 8;
  765. SDL_CPUName[i++] = (char)(c & 0xff);
  766. c >>= 8;
  767. SDL_CPUName[i++] = (char)(c & 0xff);
  768. c >>= 8;
  769. SDL_CPUName[i++] = (char)(d & 0xff);
  770. d >>= 8;
  771. SDL_CPUName[i++] = (char)(d & 0xff);
  772. d >>= 8;
  773. SDL_CPUName[i++] = (char)(d & 0xff);
  774. d >>= 8;
  775. SDL_CPUName[i++] = (char)(d & 0xff);
  776. d >>= 8;
  777. }
  778. }
  779. if (!SDL_CPUName[0]) {
  780. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  781. }
  782. }
  783. return SDL_CPUName;
  784. }
  785. #endif
  786. #endif
  787. int SDL_GetCPUCacheLineSize(void)
  788. {
  789. const char *cpuType = SDL_GetCPUType();
  790. int cacheline_size = SDL_CACHELINE_SIZE; // initial guess
  791. int a, b, c, d;
  792. (void)a;
  793. (void)b;
  794. (void)c;
  795. (void)d;
  796. if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
  797. cpuid(0x00000001, a, b, c, d);
  798. cacheline_size = ((b >> 8) & 0xff) * 8;
  799. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  800. cpuid(0x80000005, a, b, c, d);
  801. cacheline_size = c & 0xff;
  802. } else {
  803. #if defined(HAVE_SYSCONF) && defined(_SC_LEVEL1_DCACHE_LINESIZE)
  804. if ((cacheline_size = (int)sysconf(_SC_LEVEL1_DCACHE_LINESIZE)) > 0) {
  805. return cacheline_size;
  806. } else {
  807. cacheline_size = SDL_CACHELINE_SIZE;
  808. }
  809. #endif
  810. #if defined(SDL_PLATFORM_LINUX)
  811. {
  812. FILE *f = fopen("/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size", "r");
  813. if (f) {
  814. int size;
  815. if (fscanf(f, "%d", &size) == 1) {
  816. cacheline_size = size;
  817. }
  818. fclose(f);
  819. }
  820. }
  821. #elif defined(__FREEBSD__) && defined(CACHE_LINE_SIZE)
  822. cacheline_size = CACHE_LINE_SIZE;
  823. #endif
  824. }
  825. return cacheline_size;
  826. }
  827. #define SDL_CPUFEATURES_RESET_VALUE 0xFFFFFFFF
  828. static Uint32 SDL_CPUFeatures = SDL_CPUFEATURES_RESET_VALUE;
  829. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  830. static bool ref_string_equals(const char *ref, const char *test, const char *end_test) {
  831. size_t len_test = end_test - test;
  832. return SDL_strncmp(ref, test, len_test) == 0 && ref[len_test] == '\0' && (test[len_test] == '\0' || test[len_test] == ',');
  833. }
  834. static Uint32 SDLCALL SDL_CPUFeatureMaskFromHint(void)
  835. {
  836. Uint32 result_mask = SDL_CPUFEATURES_RESET_VALUE;
  837. const char *hint = SDL_GetHint(SDL_HINT_CPU_FEATURE_MASK);
  838. if (hint) {
  839. for (const char *spot = hint, *next; *spot; spot = next) {
  840. const char *end = SDL_strchr(spot, ',');
  841. Uint32 spot_mask;
  842. bool add_spot_mask = true;
  843. if (end) {
  844. next = end + 1;
  845. } else {
  846. size_t len = SDL_strlen(spot);
  847. end = spot + len;
  848. next = end;
  849. }
  850. if (spot[0] == '+') {
  851. add_spot_mask = true;
  852. spot += 1;
  853. } else if (spot[0] == '-') {
  854. add_spot_mask = false;
  855. spot += 1;
  856. }
  857. if (ref_string_equals("all", spot, end)) {
  858. spot_mask = SDL_CPUFEATURES_RESET_VALUE;
  859. } else if (ref_string_equals("altivec", spot, end)) {
  860. spot_mask= CPU_HAS_ALTIVEC;
  861. } else if (ref_string_equals("mmx", spot, end)) {
  862. spot_mask = CPU_HAS_MMX;
  863. } else if (ref_string_equals("sse", spot, end)) {
  864. spot_mask = CPU_HAS_SSE;
  865. } else if (ref_string_equals("sse2", spot, end)) {
  866. spot_mask = CPU_HAS_SSE2;
  867. } else if (ref_string_equals("sse3", spot, end)) {
  868. spot_mask = CPU_HAS_SSE3;
  869. } else if (ref_string_equals("sse41", spot, end)) {
  870. spot_mask = CPU_HAS_SSE41;
  871. } else if (ref_string_equals("sse42", spot, end)) {
  872. spot_mask = CPU_HAS_SSE42;
  873. } else if (ref_string_equals("avx", spot, end)) {
  874. spot_mask = CPU_HAS_AVX;
  875. } else if (ref_string_equals("avx2", spot, end)) {
  876. spot_mask = CPU_HAS_AVX2;
  877. } else if (ref_string_equals("avx512f", spot, end)) {
  878. spot_mask = CPU_HAS_AVX512F;
  879. } else if (ref_string_equals("arm-simd", spot, end)) {
  880. spot_mask = CPU_HAS_ARM_SIMD;
  881. } else if (ref_string_equals("neon", spot, end)) {
  882. spot_mask = CPU_HAS_NEON;
  883. } else if (ref_string_equals("lsx", spot, end)) {
  884. spot_mask = CPU_HAS_LSX;
  885. } else if (ref_string_equals("lasx", spot, end)) {
  886. spot_mask = CPU_HAS_LASX;
  887. } else {
  888. // Ignore unknown/incorrect cpu feature(s)
  889. continue;
  890. }
  891. if (add_spot_mask) {
  892. result_mask |= spot_mask;
  893. } else {
  894. result_mask &= ~spot_mask;
  895. }
  896. }
  897. }
  898. return result_mask;
  899. }
  900. static Uint32 SDL_GetCPUFeatures(void)
  901. {
  902. if (SDL_CPUFeatures == SDL_CPUFEATURES_RESET_VALUE) {
  903. CPU_calcCPUIDFeatures();
  904. SDL_CPUFeatures = 0;
  905. SDL_SIMDAlignment = sizeof(void *); // a good safe base value
  906. if (CPU_haveAltiVec()) {
  907. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  908. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  909. }
  910. if (CPU_haveMMX()) {
  911. SDL_CPUFeatures |= CPU_HAS_MMX;
  912. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  913. }
  914. if (CPU_haveSSE()) {
  915. SDL_CPUFeatures |= CPU_HAS_SSE;
  916. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  917. }
  918. if (CPU_haveSSE2()) {
  919. SDL_CPUFeatures |= CPU_HAS_SSE2;
  920. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  921. }
  922. if (CPU_haveSSE3()) {
  923. SDL_CPUFeatures |= CPU_HAS_SSE3;
  924. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  925. }
  926. if (CPU_haveSSE41()) {
  927. SDL_CPUFeatures |= CPU_HAS_SSE41;
  928. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  929. }
  930. if (CPU_haveSSE42()) {
  931. SDL_CPUFeatures |= CPU_HAS_SSE42;
  932. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  933. }
  934. if (CPU_haveAVX()) {
  935. SDL_CPUFeatures |= CPU_HAS_AVX;
  936. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  937. }
  938. if (CPU_haveAVX2()) {
  939. SDL_CPUFeatures |= CPU_HAS_AVX2;
  940. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  941. }
  942. if (CPU_haveAVX512F()) {
  943. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  944. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  945. }
  946. if (CPU_haveARMSIMD()) {
  947. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  948. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  949. }
  950. if (CPU_haveNEON()) {
  951. SDL_CPUFeatures |= CPU_HAS_NEON;
  952. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  953. }
  954. if (CPU_haveLSX()) {
  955. SDL_CPUFeatures |= CPU_HAS_LSX;
  956. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  957. }
  958. if (CPU_haveLASX()) {
  959. SDL_CPUFeatures |= CPU_HAS_LASX;
  960. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  961. }
  962. SDL_CPUFeatures &= SDL_CPUFeatureMaskFromHint();
  963. }
  964. return SDL_CPUFeatures;
  965. }
  966. void SDL_QuitCPUInfo(void) {
  967. SDL_CPUFeatures = SDL_CPUFEATURES_RESET_VALUE;
  968. }
  969. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & (f)) ? true : false)
  970. bool SDL_HasAltiVec(void)
  971. {
  972. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  973. }
  974. bool SDL_HasMMX(void)
  975. {
  976. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  977. }
  978. bool SDL_HasSSE(void)
  979. {
  980. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  981. }
  982. bool SDL_HasSSE2(void)
  983. {
  984. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  985. }
  986. bool SDL_HasSSE3(void)
  987. {
  988. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  989. }
  990. bool SDL_HasSSE41(void)
  991. {
  992. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  993. }
  994. bool SDL_HasSSE42(void)
  995. {
  996. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  997. }
  998. bool SDL_HasAVX(void)
  999. {
  1000. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  1001. }
  1002. bool SDL_HasAVX2(void)
  1003. {
  1004. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  1005. }
  1006. bool SDL_HasAVX512F(void)
  1007. {
  1008. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  1009. }
  1010. bool SDL_HasARMSIMD(void)
  1011. {
  1012. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  1013. }
  1014. bool SDL_HasNEON(void)
  1015. {
  1016. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  1017. }
  1018. bool SDL_HasLSX(void)
  1019. {
  1020. return CPU_FEATURE_AVAILABLE(CPU_HAS_LSX);
  1021. }
  1022. bool SDL_HasLASX(void)
  1023. {
  1024. return CPU_FEATURE_AVAILABLE(CPU_HAS_LASX);
  1025. }
  1026. static int SDL_SystemRAM = 0;
  1027. int SDL_GetSystemRAM(void)
  1028. {
  1029. if (!SDL_SystemRAM) {
  1030. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  1031. if (SDL_SystemRAM <= 0) {
  1032. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024 * 1024));
  1033. }
  1034. #endif
  1035. #ifdef HAVE_SYSCTLBYNAME
  1036. if (SDL_SystemRAM <= 0) {
  1037. #ifdef HW_PHYSMEM64
  1038. // (64-bit): NetBSD since 2003, OpenBSD
  1039. int mib[2] = { CTL_HW, HW_PHYSMEM64 };
  1040. #elif defined(HW_REALMEM)
  1041. // (64-bit): FreeBSD since 2005, DragonFly
  1042. int mib[2] = { CTL_HW, HW_REALMEM };
  1043. #elif defined(HW_MEMSIZE)
  1044. // (64-bit): Darwin
  1045. int mib[2] = { CTL_HW, HW_MEMSIZE };
  1046. #else
  1047. // (32-bit): very old BSD, might only report up to 2 GiB
  1048. int mib[2] = { CTL_HW, HW_PHYSMEM };
  1049. #endif // HW_PHYSMEM64
  1050. Uint64 memsize = 0;
  1051. size_t len = sizeof(memsize);
  1052. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  1053. SDL_SystemRAM = (int)(memsize / (1024 * 1024));
  1054. }
  1055. }
  1056. #endif
  1057. #if defined(SDL_PLATFORM_WINDOWS)
  1058. if (SDL_SystemRAM <= 0) {
  1059. MEMORYSTATUSEX stat;
  1060. stat.dwLength = sizeof(stat);
  1061. if (GlobalMemoryStatusEx(&stat)) {
  1062. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  1063. }
  1064. }
  1065. #endif
  1066. #ifdef SDL_PLATFORM_RISCOS
  1067. if (SDL_SystemRAM <= 0) {
  1068. _kernel_swi_regs regs;
  1069. regs.r[0] = 0x108;
  1070. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  1071. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  1072. }
  1073. }
  1074. #endif
  1075. #ifdef SDL_PLATFORM_VITA
  1076. if (SDL_SystemRAM <= 0) {
  1077. /* Vita has 512MiB on SoC, that's split into 256MiB(+109MiB in extended memory mode) for app
  1078. +26MiB of physically continuous memory, +112MiB of CDRAM(VRAM) + system reserved memory. */
  1079. SDL_SystemRAM = 536870912;
  1080. }
  1081. #endif
  1082. #ifdef SDL_PLATFORM_PS2
  1083. if (SDL_SystemRAM <= 0) {
  1084. // PlayStation 2 has 32MiB however there are some special models with 64 and 128
  1085. SDL_SystemRAM = GetMemorySize();
  1086. }
  1087. #endif
  1088. #ifdef SDL_PLATFORM_HAIKU
  1089. if (SDL_SystemRAM <= 0) {
  1090. system_info info;
  1091. if (get_system_info(&info) == B_OK) {
  1092. /* To have an accurate amount, we also take in account the inaccessible pages (aka ignored)
  1093. which is a bit handier compared to the legacy system's api (i.e. used_pages).*/
  1094. SDL_SystemRAM = (int)SDL_round((info.max_pages + info.ignored_pages > 0 ? info.ignored_pages : 0) * B_PAGE_SIZE / 1048576.0);
  1095. }
  1096. }
  1097. #endif
  1098. }
  1099. return SDL_SystemRAM;
  1100. }
  1101. size_t SDL_GetSIMDAlignment(void)
  1102. {
  1103. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  1104. SDL_GetCPUFeatures(); // make sure this has been calculated
  1105. }
  1106. SDL_assert(SDL_SIMDAlignment != 0);
  1107. return SDL_SIMDAlignment;
  1108. }