SDL_cpuinfo.c 33 KB

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  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2023 Sam Lantinga <slouken@libsdl.org>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #include "SDL_internal.h"
  19. #if defined(__WIN32__) || defined(__WINRT__) || defined(__GDK__)
  20. #include "../core/windows/SDL_windows.h"
  21. #endif
  22. /* CPU feature detection for SDL */
  23. #ifdef HAVE_SYSCONF
  24. #include <unistd.h>
  25. #endif
  26. #ifdef HAVE_SYSCTLBYNAME
  27. #include <sys/types.h>
  28. #include <sys/sysctl.h>
  29. #endif
  30. #if defined(__MACOS__) && (defined(__ppc__) || defined(__ppc64__))
  31. #include <sys/sysctl.h> /* For AltiVec check */
  32. #elif defined(__OpenBSD__) && defined(__powerpc__)
  33. #include <sys/types.h>
  34. #include <sys/sysctl.h> /* For AltiVec check */
  35. #include <machine/cpu.h>
  36. #elif defined(__FreeBSD__) && defined(__powerpc__)
  37. #include <machine/cpu.h>
  38. #include <sys/auxv.h>
  39. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  40. #include <signal.h>
  41. #include <setjmp.h>
  42. #endif
  43. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__arm__)
  44. #include <unistd.h>
  45. #include <sys/types.h>
  46. #include <sys/stat.h>
  47. #include <fcntl.h>
  48. #include <elf.h>
  49. /*#include <asm/hwcap.h>*/
  50. #ifndef AT_HWCAP
  51. #define AT_HWCAP 16
  52. #endif
  53. #ifndef AT_PLATFORM
  54. #define AT_PLATFORM 15
  55. #endif
  56. #ifndef HWCAP_NEON
  57. #define HWCAP_NEON (1 << 12)
  58. #endif
  59. #endif
  60. #if defined(__ANDROID__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  61. #include <cpu-features.h>
  62. #endif
  63. #if defined(HAVE_GETAUXVAL) || defined(HAVE_ELF_AUX_INFO)
  64. #include <sys/auxv.h>
  65. #endif
  66. #ifdef __RISCOS__
  67. #include <kernel.h>
  68. #include <swis.h>
  69. #endif
  70. #ifdef __PS2__
  71. #include <kernel.h>
  72. #endif
  73. #ifdef __HAIKU__
  74. #include <kernel/OS.h>
  75. #endif
  76. #define CPU_HAS_ALTIVEC (1 << 0)
  77. #define CPU_HAS_MMX (1 << 1)
  78. #define CPU_HAS_SSE (1 << 2)
  79. #define CPU_HAS_SSE2 (1 << 3)
  80. #define CPU_HAS_SSE3 (1 << 4)
  81. #define CPU_HAS_SSE41 (1 << 5)
  82. #define CPU_HAS_SSE42 (1 << 6)
  83. #define CPU_HAS_AVX (1 << 7)
  84. #define CPU_HAS_AVX2 (1 << 8)
  85. #define CPU_HAS_NEON (1 << 9)
  86. #define CPU_HAS_AVX512F (1 << 10)
  87. #define CPU_HAS_ARM_SIMD (1 << 11)
  88. #define CPU_HAS_LSX (1 << 12)
  89. #define CPU_HAS_LASX (1 << 13)
  90. #define CPU_CFG2 0x2
  91. #define CPU_CFG2_LSX (1 << 6)
  92. #define CPU_CFG2_LASX (1 << 7)
  93. #if defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP) && !defined(__MACOS__) && !defined(__OpenBSD__) && !defined(__FreeBSD__)
  94. /* This is the brute force way of detecting instruction sets...
  95. the idea is borrowed from the libmpeg2 library - thanks!
  96. */
  97. static jmp_buf jmpbuf;
  98. static void illegal_instruction(int sig)
  99. {
  100. longjmp(jmpbuf, 1);
  101. }
  102. #endif /* HAVE_SETJMP */
  103. static int CPU_haveCPUID(void)
  104. {
  105. int has_CPUID = 0;
  106. /* *INDENT-OFF* */ /* clang-format off */
  107. #ifndef SDL_CPUINFO_DISABLED
  108. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  109. __asm__ (
  110. " pushfl # Get original EFLAGS \n"
  111. " popl %%eax \n"
  112. " movl %%eax,%%ecx \n"
  113. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  114. " pushl %%eax # Save new EFLAGS value on stack \n"
  115. " popfl # Replace current EFLAGS value \n"
  116. " pushfl # Get new EFLAGS \n"
  117. " popl %%eax # Store new EFLAGS in EAX \n"
  118. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  119. " jz 1f # Processor=80486 \n"
  120. " movl $1,%0 # We have CPUID support \n"
  121. "1: \n"
  122. : "=m" (has_CPUID)
  123. :
  124. : "%eax", "%ecx"
  125. );
  126. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  127. /* Technically, if this is being compiled under __x86_64__ then it has
  128. CPUid by definition. But it's nice to be able to prove it. :) */
  129. __asm__ (
  130. " pushfq # Get original EFLAGS \n"
  131. " popq %%rax \n"
  132. " movq %%rax,%%rcx \n"
  133. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  134. " pushq %%rax # Save new EFLAGS value on stack \n"
  135. " popfq # Replace current EFLAGS value \n"
  136. " pushfq # Get new EFLAGS \n"
  137. " popq %%rax # Store new EFLAGS in EAX \n"
  138. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  139. " jz 1f # Processor=80486 \n"
  140. " movl $1,%0 # We have CPUID support \n"
  141. "1: \n"
  142. : "=m" (has_CPUID)
  143. :
  144. : "%rax", "%rcx"
  145. );
  146. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  147. __asm {
  148. pushfd ; Get original EFLAGS
  149. pop eax
  150. mov ecx, eax
  151. xor eax, 200000h ; Flip ID bit in EFLAGS
  152. push eax ; Save new EFLAGS value on stack
  153. popfd ; Replace current EFLAGS value
  154. pushfd ; Get new EFLAGS
  155. pop eax ; Store new EFLAGS in EAX
  156. xor eax, ecx ; Can not toggle ID bit,
  157. jz done ; Processor=80486
  158. mov has_CPUID,1 ; We have CPUID support
  159. done:
  160. }
  161. #elif defined(_MSC_VER) && defined(_M_X64)
  162. has_CPUID = 1;
  163. #elif defined(__sun) && defined(__i386)
  164. __asm (
  165. " pushfl \n"
  166. " popl %eax \n"
  167. " movl %eax,%ecx \n"
  168. " xorl $0x200000,%eax \n"
  169. " pushl %eax \n"
  170. " popfl \n"
  171. " pushfl \n"
  172. " popl %eax \n"
  173. " xorl %ecx,%eax \n"
  174. " jz 1f \n"
  175. " movl $1,-8(%ebp) \n"
  176. "1: \n"
  177. );
  178. #elif defined(__sun) && defined(__amd64)
  179. __asm (
  180. " pushfq \n"
  181. " popq %rax \n"
  182. " movq %rax,%rcx \n"
  183. " xorl $0x200000,%eax \n"
  184. " pushq %rax \n"
  185. " popfq \n"
  186. " pushfq \n"
  187. " popq %rax \n"
  188. " xorl %ecx,%eax \n"
  189. " jz 1f \n"
  190. " movl $1,-8(%rbp) \n"
  191. "1: \n"
  192. );
  193. #endif
  194. #endif
  195. /* *INDENT-ON* */ /* clang-format on */
  196. return has_CPUID;
  197. }
  198. #if (defined(__GNUC__) || defined(__llvm__)) && defined(__i386__)
  199. #define cpuid(func, a, b, c, d) \
  200. __asm__ __volatile__( \
  201. " pushl %%ebx \n" \
  202. " xorl %%ecx,%%ecx \n" \
  203. " cpuid \n" \
  204. " movl %%ebx, %%esi \n" \
  205. " popl %%ebx \n" \
  206. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  207. : "a"(func))
  208. #elif (defined(__GNUC__) || defined(__llvm__)) && defined(__x86_64__)
  209. #define cpuid(func, a, b, c, d) \
  210. __asm__ __volatile__( \
  211. " pushq %%rbx \n" \
  212. " xorq %%rcx,%%rcx \n" \
  213. " cpuid \n" \
  214. " movq %%rbx, %%rsi \n" \
  215. " popq %%rbx \n" \
  216. : "=a"(a), "=S"(b), "=c"(c), "=d"(d) \
  217. : "a"(func))
  218. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  219. #define cpuid(func, a, b, c, d) \
  220. __asm { \
  221. __asm mov eax, func \
  222. __asm xor ecx, ecx \
  223. __asm cpuid \
  224. __asm mov a, eax \
  225. __asm mov b, ebx \
  226. __asm mov c, ecx \
  227. __asm mov d, edx \
  228. }
  229. #elif (defined(_MSC_VER) && defined(_M_X64))
  230. /* Use __cpuidex instead of __cpuid because ICL does not clear ecx register */
  231. #define cpuid(func, a, b, c, d) \
  232. { \
  233. int CPUInfo[4]; \
  234. __cpuidex(CPUInfo, func, 0); \
  235. a = CPUInfo[0]; \
  236. b = CPUInfo[1]; \
  237. c = CPUInfo[2]; \
  238. d = CPUInfo[3]; \
  239. }
  240. #else
  241. #define cpuid(func, a, b, c, d) \
  242. do { \
  243. a = b = c = d = 0; \
  244. (void)a; \
  245. (void)b; \
  246. (void)c; \
  247. (void)d; \
  248. } while (0)
  249. #endif
  250. static int CPU_CPUIDFeatures[4];
  251. static int CPU_CPUIDMaxFunction = 0;
  252. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  253. static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
  254. static void CPU_calcCPUIDFeatures(void)
  255. {
  256. static SDL_bool checked = SDL_FALSE;
  257. if (!checked) {
  258. checked = SDL_TRUE;
  259. if (CPU_haveCPUID()) {
  260. int a, b, c, d;
  261. cpuid(0, a, b, c, d);
  262. CPU_CPUIDMaxFunction = a;
  263. if (CPU_CPUIDMaxFunction >= 1) {
  264. cpuid(1, a, b, c, d);
  265. CPU_CPUIDFeatures[0] = a;
  266. CPU_CPUIDFeatures[1] = b;
  267. CPU_CPUIDFeatures[2] = c;
  268. CPU_CPUIDFeatures[3] = d;
  269. /* Check to make sure we can call xgetbv */
  270. if (c & 0x08000000) {
  271. /* Call xgetbv to see if YMM (etc) register state is saved */
  272. #if (defined(__GNUC__) || defined(__llvm__)) && (defined(__i386__) || defined(__x86_64__))
  273. __asm__(".byte 0x0f, 0x01, 0xd0"
  274. : "=a"(a)
  275. : "c"(0)
  276. : "%edx");
  277. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  278. a = (int)_xgetbv(0);
  279. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  280. __asm
  281. {
  282. xor ecx, ecx
  283. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  284. mov a, eax
  285. }
  286. #endif
  287. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  288. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
  289. }
  290. }
  291. }
  292. }
  293. }
  294. static int CPU_haveAltiVec(void)
  295. {
  296. volatile int altivec = 0;
  297. #ifndef SDL_CPUINFO_DISABLED
  298. #if (defined(__MACOS__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))
  299. #ifdef __OpenBSD__
  300. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  301. #else
  302. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  303. #endif
  304. int hasVectorUnit = 0;
  305. size_t length = sizeof(hasVectorUnit);
  306. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  307. if (0 == error) {
  308. altivec = (hasVectorUnit != 0);
  309. }
  310. #elif defined(__FreeBSD__) && defined(__powerpc__)
  311. unsigned long cpufeatures = 0;
  312. elf_aux_info(AT_HWCAP, &cpufeatures, sizeof(cpufeatures));
  313. altivec = cpufeatures & PPC_FEATURE_HAS_ALTIVEC;
  314. return altivec;
  315. #elif defined(SDL_ALTIVEC_BLITTERS) && defined(HAVE_SETJMP)
  316. void (*handler)(int sig);
  317. handler = signal(SIGILL, illegal_instruction);
  318. if (setjmp(jmpbuf) == 0) {
  319. asm volatile("mtspr 256, %0\n\t"
  320. "vand %%v0, %%v0, %%v0" ::"r"(-1));
  321. altivec = 1;
  322. }
  323. signal(SIGILL, handler);
  324. #endif
  325. #endif
  326. return altivec;
  327. }
  328. #if (defined(__ARM_ARCH) && (__ARM_ARCH >= 6)) || defined(__aarch64__)
  329. static int CPU_haveARMSIMD(void)
  330. {
  331. return 1;
  332. }
  333. #elif !defined(__arm__)
  334. static int CPU_haveARMSIMD(void)
  335. {
  336. return 0;
  337. }
  338. #elif defined(__LINUX__)
  339. static int CPU_haveARMSIMD(void)
  340. {
  341. int arm_simd = 0;
  342. int fd;
  343. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  344. if (fd >= 0) {
  345. Elf32_auxv_t aux;
  346. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  347. if (aux.a_type == AT_PLATFORM) {
  348. const char *plat = (const char *)aux.a_un.a_val;
  349. if (plat) {
  350. arm_simd = SDL_strncmp(plat, "v6l", 3) == 0 ||
  351. SDL_strncmp(plat, "v7l", 3) == 0;
  352. }
  353. }
  354. }
  355. close(fd);
  356. }
  357. return arm_simd;
  358. }
  359. #elif defined(__RISCOS__)
  360. static int CPU_haveARMSIMD(void)
  361. {
  362. _kernel_swi_regs regs;
  363. regs.r[0] = 0;
  364. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  365. return 0;
  366. }
  367. if (!(regs.r[0] & (1 << 31))) {
  368. return 0;
  369. }
  370. regs.r[0] = 34;
  371. regs.r[1] = 29;
  372. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL) {
  373. return 0;
  374. }
  375. return regs.r[0];
  376. }
  377. #else
  378. static int CPU_haveARMSIMD(void)
  379. {
  380. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  381. return 0;
  382. }
  383. #endif
  384. #if defined(__LINUX__) && defined(__arm__) && !defined(HAVE_GETAUXVAL)
  385. static int readProcAuxvForNeon(void)
  386. {
  387. int neon = 0;
  388. int fd;
  389. fd = open("/proc/self/auxv", O_RDONLY | O_CLOEXEC);
  390. if (fd >= 0) {
  391. Elf32_auxv_t aux;
  392. while (read(fd, &aux, sizeof(aux)) == sizeof(aux)) {
  393. if (aux.a_type == AT_HWCAP) {
  394. neon = (aux.a_un.a_val & HWCAP_NEON) == HWCAP_NEON;
  395. break;
  396. }
  397. }
  398. close(fd);
  399. }
  400. return neon;
  401. }
  402. #endif
  403. static int CPU_haveNEON(void)
  404. {
  405. /* The way you detect NEON is a privileged instruction on ARM, so you have
  406. query the OS kernel in a platform-specific way. :/ */
  407. #ifdef SDL_CPUINFO_DISABLED
  408. return 0; /* disabled */
  409. #elif (defined(__WINDOWS__) || defined(__WINRT__) || defined(__GDK__)) && (defined(_M_ARM) || defined(_M_ARM64))
  410. /* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
  411. /* Seems to have been removed */
  412. #ifndef PF_ARM_NEON_INSTRUCTIONS_AVAILABLE
  413. #define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  414. #endif
  415. /* All WinRT ARM devices are required to support NEON, but just in case. */
  416. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  417. #elif (defined(__ARM_ARCH) && (__ARM_ARCH >= 8)) || defined(__aarch64__)
  418. return 1; /* ARMv8 always has non-optional NEON support. */
  419. #elif defined(__VITA__)
  420. return 1;
  421. #elif defined(__3DS__)
  422. return 0;
  423. #elif defined(__APPLE__) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  424. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  425. return 1; /* all Apple ARMv7 chips and later have NEON. */
  426. #elif defined(__APPLE__)
  427. return 0; /* assume anything else from Apple doesn't have NEON. */
  428. #elif !defined(__arm__)
  429. return 0; /* not an ARM CPU at all. */
  430. #elif defined(__OpenBSD__)
  431. return 1; /* OpenBSD only supports ARMv7 CPUs that have NEON. */
  432. #elif defined(HAVE_ELF_AUX_INFO)
  433. unsigned long hasneon = 0;
  434. if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0) {
  435. return 0;
  436. }
  437. return (hasneon & HWCAP_NEON) == HWCAP_NEON;
  438. #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
  439. return (getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON;
  440. #elif defined(__LINUX__)
  441. return readProcAuxvForNeon();
  442. #elif defined(__ANDROID__)
  443. /* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
  444. {
  445. AndroidCpuFamily cpu_family = android_getCpuFamily();
  446. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  447. uint64_t cpu_features = android_getCpuFeatures();
  448. if (cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) {
  449. return 1;
  450. }
  451. }
  452. return 0;
  453. }
  454. #elif defined(__RISCOS__)
  455. /* Use the VFPSupport_Features SWI to access the MVFR registers */
  456. {
  457. _kernel_swi_regs regs;
  458. regs.r[0] = 0;
  459. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  460. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  461. return 1;
  462. }
  463. }
  464. return 0;
  465. }
  466. #else
  467. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  468. return 0;
  469. #endif
  470. }
  471. static int CPU_readCPUCFG(void)
  472. {
  473. uint32_t cfg2 = 0;
  474. #if defined __loongarch__
  475. __asm__ volatile(
  476. "cpucfg %0, %1 \n\t"
  477. : "+&r"(cfg2)
  478. : "r"(CPU_CFG2));
  479. #endif
  480. return cfg2;
  481. }
  482. #define CPU_haveLSX() (CPU_readCPUCFG() & CPU_CFG2_LSX)
  483. #define CPU_haveLASX() (CPU_readCPUCFG() & CPU_CFG2_LASX)
  484. #ifdef __e2k__
  485. #ifdef __MMX__
  486. #define CPU_haveMMX() (1)
  487. #else
  488. #define CPU_haveMMX() (0)
  489. #endif
  490. #ifdef __SSE__
  491. #define CPU_haveSSE() (1)
  492. #else
  493. #define CPU_haveSSE() (0)
  494. #endif
  495. #ifdef __SSE2__
  496. #define CPU_haveSSE2() (1)
  497. #else
  498. #define CPU_haveSSE2() (0)
  499. #endif
  500. #ifdef __SSE3__
  501. #define CPU_haveSSE3() (1)
  502. #else
  503. #define CPU_haveSSE3() (0)
  504. #endif
  505. #ifdef __SSE4_1__
  506. #define CPU_haveSSE41() (1)
  507. #else
  508. #define CPU_haveSSE41() (0)
  509. #endif
  510. #ifdef __SSE4_2__
  511. #define CPU_haveSSE42() (1)
  512. #else
  513. #define CPU_haveSSE42() (0)
  514. #endif
  515. #ifdef __AVX__
  516. #define CPU_haveAVX() (1)
  517. #else
  518. #define CPU_haveAVX() (0)
  519. #endif
  520. #else
  521. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  522. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  523. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  524. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  525. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  526. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  527. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  528. #endif
  529. #ifdef __e2k__
  530. inline int
  531. CPU_haveAVX2(void)
  532. {
  533. #ifdef __AVX2__
  534. return 1;
  535. #else
  536. return 0;
  537. #endif
  538. }
  539. #else
  540. static int CPU_haveAVX2(void)
  541. {
  542. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  543. int a, b, c, d;
  544. (void)a;
  545. (void)b;
  546. (void)c;
  547. (void)d; /* compiler warnings... */
  548. cpuid(7, a, b, c, d);
  549. return b & 0x00000020;
  550. }
  551. return 0;
  552. }
  553. #endif
  554. #ifdef __e2k__
  555. inline int
  556. CPU_haveAVX512F(void)
  557. {
  558. return 0;
  559. }
  560. #else
  561. static int CPU_haveAVX512F(void)
  562. {
  563. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  564. int a, b, c, d;
  565. (void)a;
  566. (void)b;
  567. (void)c;
  568. (void)d; /* compiler warnings... */
  569. cpuid(7, a, b, c, d);
  570. return b & 0x00010000;
  571. }
  572. return 0;
  573. }
  574. #endif
  575. static int SDL_CPUCount = 0;
  576. int SDL_GetCPUCount(void)
  577. {
  578. if (!SDL_CPUCount) {
  579. #ifndef SDL_CPUINFO_DISABLED
  580. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  581. if (SDL_CPUCount <= 0) {
  582. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  583. }
  584. #endif
  585. #ifdef HAVE_SYSCTLBYNAME
  586. if (SDL_CPUCount <= 0) {
  587. size_t size = sizeof(SDL_CPUCount);
  588. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  589. }
  590. #endif
  591. #if defined(__WIN32__) || defined(__GDK__)
  592. if (SDL_CPUCount <= 0) {
  593. SYSTEM_INFO info;
  594. GetSystemInfo(&info);
  595. SDL_CPUCount = info.dwNumberOfProcessors;
  596. }
  597. #endif
  598. #endif
  599. /* There has to be at least 1, right? :) */
  600. if (SDL_CPUCount <= 0) {
  601. SDL_CPUCount = 1;
  602. }
  603. }
  604. return SDL_CPUCount;
  605. }
  606. #ifdef __e2k__
  607. inline const char *
  608. SDL_GetCPUType(void)
  609. {
  610. static char SDL_CPUType[13];
  611. SDL_strlcpy(SDL_CPUType, "E2K MACHINE", sizeof(SDL_CPUType));
  612. return SDL_CPUType;
  613. }
  614. #else
  615. /* Oh, such a sweet sweet trick, just not very useful. :) */
  616. static const char *SDL_GetCPUType(void)
  617. {
  618. static char SDL_CPUType[13];
  619. if (!SDL_CPUType[0]) {
  620. int i = 0;
  621. CPU_calcCPUIDFeatures();
  622. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  623. int a, b, c, d;
  624. cpuid(0x00000000, a, b, c, d);
  625. (void)a;
  626. SDL_CPUType[i++] = (char)(b & 0xff);
  627. b >>= 8;
  628. SDL_CPUType[i++] = (char)(b & 0xff);
  629. b >>= 8;
  630. SDL_CPUType[i++] = (char)(b & 0xff);
  631. b >>= 8;
  632. SDL_CPUType[i++] = (char)(b & 0xff);
  633. SDL_CPUType[i++] = (char)(d & 0xff);
  634. d >>= 8;
  635. SDL_CPUType[i++] = (char)(d & 0xff);
  636. d >>= 8;
  637. SDL_CPUType[i++] = (char)(d & 0xff);
  638. d >>= 8;
  639. SDL_CPUType[i++] = (char)(d & 0xff);
  640. SDL_CPUType[i++] = (char)(c & 0xff);
  641. c >>= 8;
  642. SDL_CPUType[i++] = (char)(c & 0xff);
  643. c >>= 8;
  644. SDL_CPUType[i++] = (char)(c & 0xff);
  645. c >>= 8;
  646. SDL_CPUType[i++] = (char)(c & 0xff);
  647. }
  648. if (!SDL_CPUType[0]) {
  649. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  650. }
  651. }
  652. return SDL_CPUType;
  653. }
  654. #endif
  655. #if 0
  656. !!! FIXME: Not used at the moment. */
  657. #ifdef __e2k__
  658. inline const char *
  659. SDL_GetCPUName(void)
  660. {
  661. static char SDL_CPUName[48];
  662. SDL_strlcpy(SDL_CPUName, __builtin_cpu_name(), sizeof(SDL_CPUName));
  663. return SDL_CPUName;
  664. }
  665. #else
  666. static const char *SDL_GetCPUName(void)
  667. {
  668. static char SDL_CPUName[48];
  669. if (!SDL_CPUName[0]) {
  670. int i = 0;
  671. int a, b, c, d;
  672. CPU_calcCPUIDFeatures();
  673. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  674. cpuid(0x80000000, a, b, c, d);
  675. if (a >= 0x80000004) {
  676. cpuid(0x80000002, a, b, c, d);
  677. SDL_CPUName[i++] = (char)(a & 0xff);
  678. a >>= 8;
  679. SDL_CPUName[i++] = (char)(a & 0xff);
  680. a >>= 8;
  681. SDL_CPUName[i++] = (char)(a & 0xff);
  682. a >>= 8;
  683. SDL_CPUName[i++] = (char)(a & 0xff);
  684. a >>= 8;
  685. SDL_CPUName[i++] = (char)(b & 0xff);
  686. b >>= 8;
  687. SDL_CPUName[i++] = (char)(b & 0xff);
  688. b >>= 8;
  689. SDL_CPUName[i++] = (char)(b & 0xff);
  690. b >>= 8;
  691. SDL_CPUName[i++] = (char)(b & 0xff);
  692. b >>= 8;
  693. SDL_CPUName[i++] = (char)(c & 0xff);
  694. c >>= 8;
  695. SDL_CPUName[i++] = (char)(c & 0xff);
  696. c >>= 8;
  697. SDL_CPUName[i++] = (char)(c & 0xff);
  698. c >>= 8;
  699. SDL_CPUName[i++] = (char)(c & 0xff);
  700. c >>= 8;
  701. SDL_CPUName[i++] = (char)(d & 0xff);
  702. d >>= 8;
  703. SDL_CPUName[i++] = (char)(d & 0xff);
  704. d >>= 8;
  705. SDL_CPUName[i++] = (char)(d & 0xff);
  706. d >>= 8;
  707. SDL_CPUName[i++] = (char)(d & 0xff);
  708. d >>= 8;
  709. cpuid(0x80000003, a, b, c, d);
  710. SDL_CPUName[i++] = (char)(a & 0xff);
  711. a >>= 8;
  712. SDL_CPUName[i++] = (char)(a & 0xff);
  713. a >>= 8;
  714. SDL_CPUName[i++] = (char)(a & 0xff);
  715. a >>= 8;
  716. SDL_CPUName[i++] = (char)(a & 0xff);
  717. a >>= 8;
  718. SDL_CPUName[i++] = (char)(b & 0xff);
  719. b >>= 8;
  720. SDL_CPUName[i++] = (char)(b & 0xff);
  721. b >>= 8;
  722. SDL_CPUName[i++] = (char)(b & 0xff);
  723. b >>= 8;
  724. SDL_CPUName[i++] = (char)(b & 0xff);
  725. b >>= 8;
  726. SDL_CPUName[i++] = (char)(c & 0xff);
  727. c >>= 8;
  728. SDL_CPUName[i++] = (char)(c & 0xff);
  729. c >>= 8;
  730. SDL_CPUName[i++] = (char)(c & 0xff);
  731. c >>= 8;
  732. SDL_CPUName[i++] = (char)(c & 0xff);
  733. c >>= 8;
  734. SDL_CPUName[i++] = (char)(d & 0xff);
  735. d >>= 8;
  736. SDL_CPUName[i++] = (char)(d & 0xff);
  737. d >>= 8;
  738. SDL_CPUName[i++] = (char)(d & 0xff);
  739. d >>= 8;
  740. SDL_CPUName[i++] = (char)(d & 0xff);
  741. d >>= 8;
  742. cpuid(0x80000004, a, b, c, d);
  743. SDL_CPUName[i++] = (char)(a & 0xff);
  744. a >>= 8;
  745. SDL_CPUName[i++] = (char)(a & 0xff);
  746. a >>= 8;
  747. SDL_CPUName[i++] = (char)(a & 0xff);
  748. a >>= 8;
  749. SDL_CPUName[i++] = (char)(a & 0xff);
  750. a >>= 8;
  751. SDL_CPUName[i++] = (char)(b & 0xff);
  752. b >>= 8;
  753. SDL_CPUName[i++] = (char)(b & 0xff);
  754. b >>= 8;
  755. SDL_CPUName[i++] = (char)(b & 0xff);
  756. b >>= 8;
  757. SDL_CPUName[i++] = (char)(b & 0xff);
  758. b >>= 8;
  759. SDL_CPUName[i++] = (char)(c & 0xff);
  760. c >>= 8;
  761. SDL_CPUName[i++] = (char)(c & 0xff);
  762. c >>= 8;
  763. SDL_CPUName[i++] = (char)(c & 0xff);
  764. c >>= 8;
  765. SDL_CPUName[i++] = (char)(c & 0xff);
  766. c >>= 8;
  767. SDL_CPUName[i++] = (char)(d & 0xff);
  768. d >>= 8;
  769. SDL_CPUName[i++] = (char)(d & 0xff);
  770. d >>= 8;
  771. SDL_CPUName[i++] = (char)(d & 0xff);
  772. d >>= 8;
  773. SDL_CPUName[i++] = (char)(d & 0xff);
  774. d >>= 8;
  775. }
  776. }
  777. if (!SDL_CPUName[0]) {
  778. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  779. }
  780. }
  781. return SDL_CPUName;
  782. }
  783. #endif
  784. #endif
  785. int SDL_GetCPUCacheLineSize(void)
  786. {
  787. const char *cpuType = SDL_GetCPUType();
  788. int a, b, c, d;
  789. (void)a;
  790. (void)b;
  791. (void)c;
  792. (void)d;
  793. if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
  794. cpuid(0x00000001, a, b, c, d);
  795. return ((b >> 8) & 0xff) * 8;
  796. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  797. cpuid(0x80000005, a, b, c, d);
  798. return c & 0xff;
  799. } else {
  800. /* Just make a guess here... */
  801. return SDL_CACHELINE_SIZE;
  802. }
  803. }
  804. static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
  805. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  806. static Uint32 SDL_GetCPUFeatures(void)
  807. {
  808. if (SDL_CPUFeatures == 0xFFFFFFFF) {
  809. CPU_calcCPUIDFeatures();
  810. SDL_CPUFeatures = 0;
  811. SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
  812. if (CPU_haveAltiVec()) {
  813. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  814. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  815. }
  816. if (CPU_haveMMX()) {
  817. SDL_CPUFeatures |= CPU_HAS_MMX;
  818. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  819. }
  820. if (CPU_haveSSE()) {
  821. SDL_CPUFeatures |= CPU_HAS_SSE;
  822. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  823. }
  824. if (CPU_haveSSE2()) {
  825. SDL_CPUFeatures |= CPU_HAS_SSE2;
  826. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  827. }
  828. if (CPU_haveSSE3()) {
  829. SDL_CPUFeatures |= CPU_HAS_SSE3;
  830. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  831. }
  832. if (CPU_haveSSE41()) {
  833. SDL_CPUFeatures |= CPU_HAS_SSE41;
  834. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  835. }
  836. if (CPU_haveSSE42()) {
  837. SDL_CPUFeatures |= CPU_HAS_SSE42;
  838. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  839. }
  840. if (CPU_haveAVX()) {
  841. SDL_CPUFeatures |= CPU_HAS_AVX;
  842. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  843. }
  844. if (CPU_haveAVX2()) {
  845. SDL_CPUFeatures |= CPU_HAS_AVX2;
  846. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  847. }
  848. if (CPU_haveAVX512F()) {
  849. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  850. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  851. }
  852. if (CPU_haveARMSIMD()) {
  853. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  854. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  855. }
  856. if (CPU_haveNEON()) {
  857. SDL_CPUFeatures |= CPU_HAS_NEON;
  858. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  859. }
  860. if (CPU_haveLSX()) {
  861. SDL_CPUFeatures |= CPU_HAS_LSX;
  862. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  863. }
  864. if (CPU_haveLASX()) {
  865. SDL_CPUFeatures |= CPU_HAS_LASX;
  866. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  867. }
  868. }
  869. return SDL_CPUFeatures;
  870. }
  871. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & (f)) ? SDL_TRUE : SDL_FALSE)
  872. SDL_bool SDL_HasAltiVec(void)
  873. {
  874. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  875. }
  876. SDL_bool SDL_HasMMX(void)
  877. {
  878. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  879. }
  880. SDL_bool SDL_HasSSE(void)
  881. {
  882. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  883. }
  884. SDL_bool SDL_HasSSE2(void)
  885. {
  886. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  887. }
  888. SDL_bool SDL_HasSSE3(void)
  889. {
  890. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  891. }
  892. SDL_bool SDL_HasSSE41(void)
  893. {
  894. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  895. }
  896. SDL_bool SDL_HasSSE42(void)
  897. {
  898. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  899. }
  900. SDL_bool SDL_HasAVX(void)
  901. {
  902. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  903. }
  904. SDL_bool SDL_HasAVX2(void)
  905. {
  906. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  907. }
  908. SDL_bool SDL_HasAVX512F(void)
  909. {
  910. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  911. }
  912. SDL_bool SDL_HasARMSIMD(void)
  913. {
  914. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  915. }
  916. SDL_bool SDL_HasNEON(void)
  917. {
  918. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  919. }
  920. SDL_bool SDL_HasLSX(void)
  921. {
  922. return CPU_FEATURE_AVAILABLE(CPU_HAS_LSX);
  923. }
  924. SDL_bool SDL_HasLASX(void)
  925. {
  926. return CPU_FEATURE_AVAILABLE(CPU_HAS_LASX);
  927. }
  928. static int SDL_SystemRAM = 0;
  929. int SDL_GetSystemRAM(void)
  930. {
  931. if (!SDL_SystemRAM) {
  932. #ifndef SDL_CPUINFO_DISABLED
  933. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  934. if (SDL_SystemRAM <= 0) {
  935. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024 * 1024));
  936. }
  937. #endif
  938. #ifdef HAVE_SYSCTLBYNAME
  939. if (SDL_SystemRAM <= 0) {
  940. #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__) || defined(__DragonFly__)
  941. #ifdef HW_REALMEM
  942. int mib[2] = { CTL_HW, HW_REALMEM };
  943. #else
  944. /* might only report up to 2 GiB */
  945. int mib[2] = { CTL_HW, HW_PHYSMEM };
  946. #endif /* HW_REALMEM */
  947. #else
  948. int mib[2] = { CTL_HW, HW_MEMSIZE };
  949. #endif /* __FreeBSD__ || __FreeBSD_kernel__ */
  950. Uint64 memsize = 0;
  951. size_t len = sizeof(memsize);
  952. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  953. SDL_SystemRAM = (int)(memsize / (1024 * 1024));
  954. }
  955. }
  956. #endif
  957. #if defined(__WIN32__) || defined(__GDK__)
  958. if (SDL_SystemRAM <= 0) {
  959. MEMORYSTATUSEX stat;
  960. stat.dwLength = sizeof(stat);
  961. if (GlobalMemoryStatusEx(&stat)) {
  962. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  963. }
  964. }
  965. #endif
  966. #ifdef __RISCOS__
  967. if (SDL_SystemRAM <= 0) {
  968. _kernel_swi_regs regs;
  969. regs.r[0] = 0x108;
  970. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  971. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  972. }
  973. }
  974. #endif
  975. #ifdef __VITA__
  976. if (SDL_SystemRAM <= 0) {
  977. /* Vita has 512MiB on SoC, that's split into 256MiB(+109MiB in extended memory mode) for app
  978. +26MiB of physically continuous memory, +112MiB of CDRAM(VRAM) + system reserved memory. */
  979. SDL_SystemRAM = 536870912;
  980. }
  981. #endif
  982. #ifdef __PS2__
  983. if (SDL_SystemRAM <= 0) {
  984. /* PlayStation 2 has 32MiB however there are some special models with 64 and 128 */
  985. SDL_SystemRAM = GetMemorySize();
  986. }
  987. #endif
  988. #ifdef __HAIKU__
  989. if (SDL_SystemRAM <= 0) {
  990. system_info info;
  991. if (get_system_info(&info) == B_OK) {
  992. /* To have an accurate amount, we also take in account the inaccessible pages (aka ignored)
  993. which is a bit handier compared to the legacy system's api (i.e. used_pages).*/
  994. SDL_SystemRAM = (int)SDL_round((info.max_pages + info.ignored_pages > 0 ? info.ignored_pages : 0) * B_PAGE_SIZE / 1048576.0);
  995. }
  996. }
  997. #endif
  998. #endif
  999. }
  1000. return SDL_SystemRAM;
  1001. }
  1002. size_t SDL_SIMDGetAlignment(void)
  1003. {
  1004. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  1005. SDL_GetCPUFeatures(); /* make sure this has been calculated */
  1006. }
  1007. SDL_assert(SDL_SIMDAlignment != 0);
  1008. return SDL_SIMDAlignment;
  1009. }